jpeg格式到bmp格式的硬件实现，verilog开发，fpga 实现。

Pure hardware JPEG Encoder design. Package includes vhdl source code, test bench, detail design document. Written in VHDL. Verified on Xilinx XC4VLX25. Rncode 320x240 bmp picture in 3ms at 50 quality, 100Mhz clock.-Pure hardware JPEG Encoder design.

在FPGA开发下，可以帮助从JPEG或者BMP转换为MIF文件格式，具有很好的帮助FPGA开发-In FPGA development can help convert from JPEG or BMP file formats MIF has good help FPGA development