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clockprj
- vhdl实现的万年历代码，年月日 星期 闹钟功能、-vhdl to calendar code, date week alarm clock function,
EDA-clock
- 基于FPGA的时钟设计,主要能实现计时和日历功能-The clock design based on FPGA, the main can realize clock and calendar function
multifuctional-digital-clock
- 多功能数字钟，万年历，可显示时间，年月日，闹钟，功能十分强大，在DE0上通过-Multifunction digital clock, calendar, you can display the time, date, alarm clock, is very powerful in the DE0 by
electric-clock
- 电子钟，采用数码管显示，实现日历，时钟，校准，定时器功能-Electronic clock, the use of digital tube display, the realization of the calendar, clock, calibration, timer function
clock
- 用Verilog编程设计出一个具有计时，校准，闹钟，日历等功能的电子时钟； -Design a program with Verilog have time, calibration, alarm clock, calendar and other functions of electronic clock
1602timer
- 用verilog实现的，在1602液晶显示万年历修改FPGA芯片类型可以直接使用-Using Verilog to achieve, in the 1602 liquid crystal display calendar modified type of FPGA chip can be used directly
baseonFPGAclock
- 用verilogHDL语言写的基于FPGA的电子钟。里面包含闹钟、秒表、日历、时间设置等功能，可用LCD显示-verilog language, implemented on the FPGA alarm clock, calendar, time display, stopwatch in one of the electronic clock and calendar. Can be displayed on LCD
Clock
- 该程序主要是用Verilog HDL语言编写的多功能数字钟，包括校时，调试，整点报时和万年历模块。-The program is mainly used Verilog HDL language multifunction digital clock, including at school, debugging, the whole point timekeeping and calendar modules.
12_24clock
- 基于FPGA的数字万年历设计。可显示年月日时分秒星期，可校时，可整点报时。-FPGA-based design of digital calendar. Displays the date when the minutes and seconds the week, when the school can be the whole point timekeeping.
基于CPLD的万年历的设计
- vhdl编的一个万年历，比较详细具体，学生做的一个课程设计(Calendar written by VHDL)
jishi
- 用verilog语言设计了一个万年历，包括闰年判断，仿真正确(A calendar is designed with Verilog language, including leap year judgment, simulation is correct)
万年历
- 基于FPGA的数码管显示，万年历，包括时分秒年月日的现实(Calendar FPGA digital tube display, based on reality, and the date of the time)