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anjian
- 按键输入模块（key）： --可编程延时发生器（数字同步机）的前端输入模块：0－9十个数字键按键输入模块原型 --前端模块：消抖 --对i0－i9十个输入端的两点要求： --（1）输入端要保证一段时间的稳定高电平 --（2）不能同时按下两个或多于两个的键 --后级模块：1、编码；2、可变模计数器 --编码模块：8线－4线（0－8 BCD码） --可变模计数器模块：以编码模块输出的32位BCD码为模值-button input module (key) : -- p
译码器
- 通过对用硬件描述语言VHDL表示的某个专用部件（如中断控制器、差错控制码编码/译码器，此为译码器）的代码分析，构建它的逻辑结构，加深对相关部件设计技术的理解。 试验平台：MaxPlusII -through the use of VHDL hardware descr iption language said a special components (such as interrupt controllers, error control coding / decoding devic
arith_lib-1.0
- 包括所有常用算法：加权计算，进制转换，常用数据编码等，大约共有源代码80个。-include all commonly used algorithms : weighted basis, the base for the conversion, common data coding, source code, a total of about 80.
trellis_verlog
- ATSC发送端部分，ATSC标准特有的TCM编码，共6个文件，包含tb文件，已通过仿真，没有问题，verilog代码-ATSC transmitter, the ATSC standard TCM unique coding, a total of six documents, tb-contained documents, had passed through simulation, no problem, verilog code
FPGAJPEGCODING
- motionjpeg的FPGA编码实现，有点老了，但是可以参考．有些东西和h.264是差不多的．-motionjpeg FPGA Coding, a bit old, but the reference. Some things and h.264 is roughly the same.
Coding-style-and-guidelines-of-HDL
- 该资料对数字设计的编码风格、编码规范给出了详细介绍，并简介了VHDL、verilog的编码要点。-The information on the coding style of digital design, coding specification gives a detailed descr iption and profile of VHDL, verilog coding points.
Guide_to_HDL_Coding_Styles_for_Synthesis
- 讲述了HDL编码风格的一本好书，不论使用VHDL或verilog的都可以-HDL coding style tells a good book, regardless of the use of VHDL or verilog can take a look at the
bch-coding
- In this project, we are implementing the error detection and correction using BCH code (Bose Chaudhuri Hocquenghem). Using VHDL and targeted on FPGA for synthesis of the code. The encoder and decoder combine called as a codec.
fonts-for-coding
- A good font for all the programers. and it s so nice and so beautiful.
A-VHDL-Function-for-finding-SQUARE-ROOT
- vhdl coding for square root-vhdl coding for square root...
A-VLSI-PROGRESSIVE-CODING-FOR-WAVELET-BASED-IMAGE
- this fpga based vhdl coding and report for wavlet based image compression in vhdl -this is fpga based vhdl coding and report for wavlet based image compression in vhdl
PCM-Coding
- VHDL语言实现了PCM采编器，应用计数器、数据选择器实现了PCM编码与传输控制，系统时钟由分频器实现。-VHDL language PCM editing application counter, the data selector PCM encoding and transmission control of the system clock by a divider.
coding-for-Simulation
- For filter --a novel area efficient architecture in verilog and testbench is developed
A-VLSI-PROGRESSIVE-CODING-FOR-WAVELET-BASED-IMAGE
- a vlsi progressive coding technique
vhdl-_hamming
- 基于FPGA，利用vhdl语言实现hamming编码的一段程序，已经仿真过-Based on FPGA, VHDL language hamming coding a program simulation
clock
- 采用可综合的Verilog代码编写一个带闹钟功能的数字钟。使其具有以下功能： 1)计时功能：包括小时、分钟、秒钟。 2)校时功能：对小时、分钟和秒钟进行手动校时。 3)定时和闹钟功能：能在手工设定的时间产生闹铃音。 -Using synthesizable Verilog coding a digital clock with alarm. It has the following features: 1) timing functions include: hours, m
Coding Files
- Through this paper our attempt is to give a onetime networking solution by the means of merging the VLSI field with the networking field as now a days the router is the key player in networking domain so the focus remains on that itself to get a good
Coding files
- The past several years have witnessed a rapid development in the wireless network area. So far wireless networking has been focused on high speed and long range applications. Zigbee technology was developed for a Wireless Personal Area Networks WPAN
Coding Files
- Floating Point FP multiplication is widely used in large set of scientific and signal processing computation. Multiplication is one of the common arithmetic operations in these computations. A high speed floating point double
Q4-a.tar
- verilog coding beginer level