搜索资源列表
DDC.rar
- verilog语言实现的数字下变频设计。 在ALTERA的QUARTUS ii下实现。实用，好用。,Verilog language implementation of the digital down-conversion design. ALTERA at the implementation of QUARTUS ii. Practical, easy to use.
project_UHF_ddc
- vhdl语言写的数字下变频的实现，整个工程文件，xlinx ise用的-VHDL language written in the realization of digital down conversion, the whole project file, xlinx ise used
DDC_CIC
- 用CIC 和 FIR Filters设计的数字下变频器，DSP Builder6.1版工程文件-Using CIC and FIR Filters Design of Digital Down Converter, DSP Builder6.1 version of project file
FIR_TEST
- 应用matlab 软件设计了下变频器中的CIC、HB、FIR滤波器等核心模块，并将各模块融为一体从软件实现的角度完成了对系统的搭建和功能仿真。-About such key algorithms as CIC, HB, FIR of each module in down- conversion, discussion, abstraction and summarization are given in this paper. Using the MATLAB software, we des
tes_amp_80_0314
- 基于dsp builder的数字下变频器，IP核做的-digital down converter,degigned in matlab
freqconv
- In digital signal processing, a digital down-converter (DDC) converts a digitized real signal centered at an intermediate frequency (IF) to a basebanded complex signal centered at zero frequency. In addition to downconversion, DDC’s typically decimat
digital-quadrature-down-converter
- 基于FPGA的数字正交下变频器设计,在ALTERA的DE2开发板上设计一个多相滤波结构数字正交变换器。其中多相滤波模块是最关键模块，该模块将64阶滤波器的系数分成奇偶两路，并通过VHDL常数的方式存储在模块内部。这些常数是通过在MATLAB中调用FDATool，根据滤波器的参数要求来生成的。这些浮点格式的滤波器系数还需要在MATLAB中计算成二进制补码的形式，才可以存储在模块中。-FPGA-based digital quadrature down-converter design, ALTER
vibration_sensor_using-arduino
- Maxcon Voltage Converter 220 To 110V (50 Watt) Step Down. ... Operate your 110V/120V electric appliances or electronic devices overseas in countries using 220V/240V
BPSK
- 先用Matlab理论仿真，得出滤波器系数。再用Verilog语言在ISE环境下编写程序，通过Modelsim和ChipScope进行波形仿真和引号抓取，从而提高调试的效率。通过手机发送指令来控制上下变频器的参数。(Firstly, the filter coefficients are obtained by simulation with the theory of matlab. Then the program is written in Verilog language under IS