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内有LED译码器，汉明纠错译码器，地址译码器，最高优先译码器，双2－4译码器等VHDL的源代码-decoder, Hamming error correction decoder, address decoder, the highest priority decoder, dual 2-4 decoder such as VHDL source code
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循环纠错码译码器VHDL代码。通信方面FPGA设计基础代码。-cycle error correction decoder VHDL code. Communications FPGA design code base.
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用Verilog语言编写的对m序列进行汉明码编译码的程序。具体实现为产生m序列后对其进行(7,4)汉明码编码并加错，然后将其纠错译码并输出，详细过程见仿真。-Written by Verilog m sequence of procedures for coding and decoding Hamming codes. Concrete realization of m sequence to produce its (7,4) hamming code and a mistake, and
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The Altera(R) RTP Receiver function implements a buffer for
received RTP packets. Duplicated and re-ordered packets are
corrected. Missing packets can be fixed using Pro-MPEG Code
of Practice #3 Forward Error Correction
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turbo product code used in error correction
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CRC检错程序。只能检错不能纠错。（40,32）的分组码检错，反馈函数：x8+x7+x4+x3+x+1-CRC error detection process. Not only error detection correction. (40,32) and block code error detection, feedback function: x8+ x7+ x4+ x3+ x+1
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In this project, we are implementing the error detection and correction using BCH code (Bose Chaudhuri Hocquenghem). Using VHDL and targeted on FPGA for synthesis of the code. The encoder and decoder combine called as a codec.
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基于C的BCH纠错码研究，已经做了调试，和你好用。-C-based study of the BCH error correction code, debugging has been done, and Hello to use.
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7bit Hamming code decoder, error detection and correction
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BCH 是纠错能力可控的纠错编码，是循环码的子类． 介绍了BCH 码的编码原理和设计方法，在特定信道和调制方式下对经过BCH 编码的系统进行仿真，分析BCH 码在特定信道下的编码增益.-BCH is error correction ability of controllable error correction coding, is a subclass of cyclic code. Introduces BCH code coding principle and design method
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BCh code for error correction contro-BCh code for error correction controll
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BCH译码器设计源代码，它能实现对两位错误的纠正。这是最新版本。-The BCH decoder design source code, it can achieve the two error correction. This is the latest version.
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RS(7,3,4)，码长七位，信息位三位，纠错位四位，经过验证成功-RS (7,3,4), the code length of seven, three of information bits, bit error correction four proven successful
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卷积码是一种重要的前向纠错信道编码方式，其纠错性能常常优于分组码，且(2,1,7)卷积码已应用于现代卫星通信系统中。Viterbi译码算法能最大限度地发挥卷积码的优异性能。这里采用Verilog HDL语言设计出(2,1,7)卷积码的编码器模块和基于Viterbi算法的译码器模块，译码器采用全并行结构，译码速度快-Convolutional code is an important forward error correction channel coding method, and
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基于汉明码的ECC纠错算法，可纠错1位，供参考(An ECC error correction algorithm based on hamming code can be used for reference)
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基于BCH码的ECC纠错算法，可纠错2位错误码，供参考(Based on BCH code ECC error correction algorithm, two error codes can be corrected for reference.)
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