使用Verilog编写的同步FIFO，可通过设置程序中的DEPTH设置FIFO的深度，FIFO_WRITE_CLOCK上升沿向FIFO中写入数据， FIFO_READ_CLOCK上升沿读取数据。本程序对FIFO上层操作简单实用。-Prepared by the use of Verilog synchronous FIFO, through the setup program in the FIFO depth DEPTH settings, FIFO_WRITE_CLOCK rising

pic单片机的脉冲宽度设置程序，虽然程序非常的简单，但是能够自由的调整脉冲宽度-pic microcontroller pulse width of the setup program, although the program is extremely simple, but the freedom to adjust the pulse width