搜索资源列表
VHDL_processor
- 利用VHDL语言描述的一个简单微处理器,可以通过修改源码来调整指令集,可以在Quartus II上直接运行和编译.-use VHDL descr iption of a simple microprocessor, can modify the source codes to adjust instruction set, Quartus II can be directly compiled and running.
Altera_DDR_controller_core
- Altera DDR SDRAM控制器完整Verilog代码包，包括Verilog源代码，Doc说明文档，仿真DDR芯片模型，仿真testbench等-Altera DDR SDRAM Controller. Verilog source codes, descr iption documents, DDR verilog model and simulation testbench are all included.
gh_timer_8254
- VHDL Source code for 8254 timer/counter
minimigJ_source_04_08_2008
- Verilog, c and asm source codes of the Minimig system, a fpga implementation of the Amiga computer. Version minimig-j used on the Minimig fpga board.
fpga64_027
- VHDL source codes of the FPGA64, a fpga implementation of the C64 computer. Version for the c-one fpga board.
T65_v302
- VHDL source codes of a 65xx compatible cpu core. Version 302.
sdram32
- DDR SDRAM source verilog source codes
I2C--VHDL
- I2C总线在可编程逻辑器件上实现的VHDL源码-VHDL source codes for realizing I2C
WIRELESS
- This file contains source code for DS-CDMA transciver using VHDL. it is having two source codes one is for Transmitter and another is for reciever programme.
VerilogLabSource
- Verilog Lab Source Codes
syn-fifo-verilog
- 用verilog语言写的同步FIFO设计源代码。-The source codes for syn-fifo using verilog language.
FSMHandouts
- Finite state machines on VHDL source codes and handouts
VHDL_Complex_Examples
- Some slides with complex vhdl examples. There you can find UART,ROMs,RAMs and other source codes and details for every one
CLOCK-ON-ALTERA-DEV-NOARD-RONTEX
- 这是我上电子线路设计课程时自己写的数字钟设计的整个工程.网上下载安装quartus II软件后双击clock.sof打开调试.若软件说没有权限,请删除db文件夹后再试. 文件夹中附带我的实验报告,其中详细讲解了我的设计思路\软件架构\可能出现的问题等等. 调试步骤就不讲了,管脚分配请网友自行完成. 开发板 Altera Cyclone II EP2C35F672C6 软件平台 Quartus II 语言 verilogHDL-These are all the project
lcd-16x2-arduino-lcd-codes
- Source code print caracter to lcd 16x2 from arduino modules
lock
- 8051 Electronic Lock Source codes and circuit diagram.
cyc
- VHDL source codes for ALU modules.
5-verilog-programs
- the file contains 5 verilog source codes 1. varying pulses 2. DRAM 3. FIFO 4. UART 5. 16 bit divider
Source codes
- Involves source codes of vlsi projects
verilog-source-codes
- the attached programs are source codes of 4-bit ring counter, 16x1 mux, 8x3 priority encoder, 4x16 decoder, full subtractor using two half subtractors