搜索资源列表
ddr_controller
- 完整的DDR控制器设计，包含代码、仿真环境、FPGA综合网表等-full DDR controller ip,include rtl code,simulation environment and testbench, fpga synthesis netlist,etc.
memTB
- it is a testbench describing the function of a memory
sdram_test
- 在vivado中用于测试SDRAM，DDR3学习比较有帮助-the testbench for ddr3
sel
- fpga i/o 速率测试代码，含有testbench(FPGA i/o rate test code, containing testbench)