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yuvrgb
- 将yuv4：2：2的图像数据转为rgb格式，用Verilog HDL编写-yuv4：2：2 to rgb
filter_dds_10.29_7.2
- 一个经过处理的FIR filter, verilog HDL实现在FPGA上-One new design of digital FIR filter , which can be implemented in FPGA kit
base2-8fft-verilog
- 一个实现基2 8点傅里叶变换的verilog程序-A multi-point Fourier transform matlab program, you can see the real and imaginary parts of processed data.
vga_inout_sdram_32bit_143M(2 60)
- 基于AD9884芯片，用Verilog HDL 硬件描述语言来实现图像的抖动处理(Based on AD9884 chip, we use Verilog HDL hardware descr iption language to achieve image jitter processing.)