This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both

单载波 BPSK QPSK调制下的PLL功能实现 实现频率相位的跟踪-Single carrier BPSK QPSK modulation the PLL frequency phase tracking

单相信号的锁相功能实现（PLL），自动跟踪单相电网信号。-Single-phase signalof thelock-infunctions to achieve(PLL),automatic trackingof single-phasepowersignals.

较为详细地介绍了单同步坐标系软件锁相环，采用了单一的同步坐标系锁相控制结构，一般适用于电网电压平衡时的相位，频率及幅值的检测，以及用于多种控制结构中（下垂控制，PQ控制，双闭环控制）。-A more detailed descr iption of the principle of a single coordinate system PLL synchronization and setting PI controller parameters. SPLL with a single sync