该文件为多种CRC校验的不同的verilog实现，开发平台为QUATUS2，可直接运行

CRC计算模块，7位CRC计算。经过FPGA及IC平台验证。-CRC calculation module, 7 CRC calculation. Through the FPGA and IC platform for verification.

RFC1662 CRC-16 table generation and CRC checking. Implemented in embedded matlab with scr ipt to test and enable c/c++ code generation. Useful fo check against VHDL/Verilog and other embedded systems to help generate test vectors.