搜索资源列表
automatic-elevator
- 使用VHDL语言编写的基于FPGA的自动升降电梯控制器-VHDL language using FPGA-based controller of automatic elevators
lock
- EDA课程设计报告 － 电子密码锁设计实验 密码锁密码为4位-Curriculum design EDA Report- electronic locks locks password experimental design for four
reed
- this the completedocumentation and code about reed solomon logic implemented on fpga in verilog.-this is the completedocumentation and code about reed solomon logic implemented on fpga in verilog.
UP3_clock
- 这是一个电子钟程序，采用VHDL开发，在altera的FPGA板上实现。-clock VHDL altera FPGA
last2_stm
- The main program that describes the entire FPGA and calls entities described in the other VHDL programs.
example18
- 基于FPGA的交通灯控制 基于FPGA的交通灯控制基于FPGA的交通灯控制-FPGA-based control of traffic lights at the traffic lights based on the FPGA to control the traffic lights on the control FPGA
all
- This application is about Xilinx FPGA. It suits students in the college who have little knowlege about the FPGA.
timer
- This application is about the Timer in the Xilinx FPGA. It suits students in the college who have little knowlege about the FPGA.
UARTTransmitterModel
- usart modelling in vhdl for fpga users
Documents
- document for blaster fpga programmer
verilog
- AD0809电压采集的芯片资料关于FPGA资料的一些说明
keyscan4X4
- FPGA矩阵键盘，VHDL编写，亲测可用-The FPGA matrix keyboard, VHDL prepared, pro-test available
vhdlkeyscan4X4
- FPGA矩阵键盘，VHDL编写，亲测可用-The FPGA matrix keyboard, VHDL prepared, pro-test available
0
- FPGA控制DDSAD9854芯片程序。-The FPGA control DDSAD9854 chip program.
1
- FPGA芯片EP2C8T144C8控制LCD1602显示程序-The FPGA chip EP2C8T144C8 control LCD1602 display program
modulator
- 基于单芯电缆的多载波技术，FPGA,OFDM通信程序，调制解调器，调制模块-Multi-carrier technology based on the single-core cables, the FPGA, the OFDM communication program, the modem modulation module
QR
- QR分解是球形MIMO检测算法必不可少的环节,本代码采用m语言描述了QR分解分解具体怎么实现,而不是直接调用matlab内部函数,采用的是QR分解的脉动阵列结构,据此代码可轻易实现QR分解的FPGA设计-QR decomposition is an essential part of the spherical MIMO detection algorithm, the code uses QR decomposition decomposition m language to describe
digital-frequency-counter
- 基于FPGA的数字频率计，verilog hdl编写-digital frequency counter ，using verilog hdl
three_ph_sin
- 这个文件能够使fpga产生三项正弦波。每一项角度相差180度。-This file make fpga produce the three sine wave. An angle difference of 180 degrees.