搜索资源列表
myfifo_bb
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
cfifo_ptrs_binary
- system verilog fifo env
FIFO.OPT
- 操作系统课程设计（源码和报告） 请求页式管理缺页中断模拟设计--FIFO、OPT-Operating systems curriculum design (source code and reports) request page management page fault analog design- FIFO, OPT
FIFO3
- 这个是8*4位的,FIFO,,大家可作参考资料-This is 8* 4-bit, FIFO,, We can make reference
fifo123456
- 16*16位的先进先出队列FIFO程序,可作参考-16* 16-bit FIFO queue FIFO procedures, can be used for reference
Virtualmemory
- 虚拟内存中四种置换算法: OPT/LRU/FIFO/时钟算法-Four types of virtual memory replacement algorithm: OPT/LRU/FIFO/clock algorithm
fifodd
- 一个深度为32，字长为8_bit FIFO（先进先出）寄存器，有寄存器空、寄存器满和寄存器溢出信号。-A depth of 32, word length for 8_bit FIFO (FIFO) register, a register space, register and register full signal overflow.
os
- 实现分页式存储地址转换过程，在此基础上实现请求分页的地址转换。实现请求页式地址转换中出现的缺页现象时，用到的先进先出FIFO、最近最久未使用LRU、最佳OPT置换算法。 -The realization of paging memory address translation process, in this based on the address translation request page. The realization of Page Address Translation req
UART
- A badic controller for the UART. It incorporates a -- transmit and receive FIFO (from Max+Plus II s MegaWizard -- plug-in manager). Note that no checking is done to see -- whether the FIFOs are overflowing or not. This strictly -- handles the
simulator
- ssd5 fifo.h 模拟打印机全部源代码-Printer simulation ssd5 fifo.h
File
- 设计一个请求页式存储管理方案，并编写模拟程序实现之。页面淘汰算法采用 ① FIFO页面淘汰算法 ② LRU页面淘汰算法。-sorry
fifo
- 先来先服务程序调度实现缺页中断调度算法驻留集大小，页面数，缺页中断数-fifo
FIFO
- 利用Verilog实现了一个FIFO，包含几个模块文件，适合初学Verilog的朋友，含测试代码。-Verilog achieved using a FIFO, a document contains several modules, suitable for novice Verilog friends, including test code.
fifo
- 页面置换算法，利用程序语言实现的 FIFO算法-fifo OS
fifo_syn
- 同步fifo并有详细的文档说明，希望对大家有帮助-Synchronous fifo and detailed documentation, we want to help
fifo-opt
- 四种页面置换算法，lru，二次机会，fifo，opt -lru,nur,fifo,opt
fifo
- 一个自己写的fifo代码，思路非常清晰,大家可以下载学习-good fifo
PageReplace
- FIFO and LRU replcement (huynhnv.cyworld.vn)
FIFO
- 操作系统中的先进先出(FIFO)页面置换算法的C++源代码-Operating in the FIFO (FIFO) Page Replacement Algorithm for C++ source code
SC16C752B
- The SC16C752B is a dual Universal Asynchronous Receiver/Transmitter (UART) with 64-byte FIFOs, automatic hardware/software flow control, and data rates up to 5 Mbit/s (3.3 V and 5 V). The SC16C752B offers enhanced features. It has a Transmission