搜索资源列表
Cache_FIFO
- 模拟内存高速缓存技术C源码，主要是FIFO形式。-simulated high-speed cache memory technology C source code, is the main form of FIFO.
fifo_ver_131
- fifo verilog hdl 源程序-fifo verilog hdl source
fifo_vhd_131
- fifo vhdl源程序-fifo vhdl source
zhongduan
- 根据所给的内存块数以及不同作业（进程）占用的时间片的不同，分别以FIFO或者LRU算法得到进程缺页中断情况-list the pause stuation in two differant ways...such as FIFO,LRu.
uartfifo
- 以Proasic3 Start kit开发板为平台，介绍了FIFO的基本功能。-ProASIC3 Start Kit development board as a platform to introduce the basic functions of the FIFO.
SDRAM_FPGA
- 这个是SDRAM的控制程序，包括包括UART和FIFO模块，适合FPGA开发人员看，也适合初学者学习。-This is the SDRAM control procedures, including including UART and FIFO module, suitable for FPGA developers look, but also suitable for beginners to learn.
segment-page
- 段页式虚拟设计管理 用于操作系统课程设计作业，可支持LRU和FIFO访问-Virtual Design Management section page
FIFO
- FIFO读写操作，quartusII VHDL IP FPGA-FIFO VHDL IP FPGA