MSP-FET430P410 Demo - Timer_A Toggle P5.1, CCR0 Contmode ISR, DCO SMCLK Descr iption Toggle P5.1 using using software and TA_0 ISR. Toggle rate is set at 50000 DCO/SMCLK cycles. Default DCO frequency used for TACLK. Durring the TA_0 ISR P5

CHIP SN8P2604 ------------------------------------------------------------ 功能描叙：开机为全灭 I)KEY按下。A区工作：A区灯加速后减速最后停止，再在原地闪 0.3SH+0.3SL，B区为不亮 II)KEY按下。B区工作：B区灯加速后减速最后停止，如果B区最后停点与A区同，A区与B区同时亮灭 （A区B区灯的颜色和停止点都为随机产生） 如果A区与B区最后停点不同，A区与B区互亮互灭

遗传算法代码，计算确定函数式在【-2，2】上的极值，需要自己整合染色体区间-Genetic algorithm code, calculate and determine the function formula in [2,2] on the extreme value, we need to integrate their chromosomal interval