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cy7c68013工作在SLAVE FIFO下的FPGA源代码
- cy7c68013工作在SLAVE FIFO下的FPGA源代码,已经通过,Verilog编写,cy7c68013 slave fifo mode code ,written by hard ware language
syn_fifo
- 基于systemverilog的异步fifo-fifo of design ,system verilog
fifo_module
- verilog 语言写的FIFO历程,可以很好参考。 -The write FIFO verilog language course, a good reference.
fifo
- 这篇文档主要是描述了fifo的作用,里面有用verilog写的源码,及其综合后的结果-This document mainly describes the role of the FIFO inside useful verilog to write source code, and its consolidated results
ht_fifo
- fifo 读写代码,能够进行速率匹配,很好的源代码-verilog hdl