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vhdl2DPSK
- 用VHDL设计了一种2DPSK信号产生器，测试和实际应用表明其性能稳定可靠。-VHDL design of a 2DPSK Signal Generator, testing and practical application show that its performance is stable and reliable.
ddsbyvhdl
- 摘要：介绍了基于可编程逻辑器件CPLD和直接数字频率合成技术（DDS）的三相多波形函数发生器的基本原理，并在此基础上给出了基于CPLD的各模块设计方法及其VHDL源程序-Abstract : Based on the CPLD and direct digital frequency synthesis (DDS) of a three-phase multi-function waveform Generator to the basic principles and on this basi
m
- 基于VHDL的M序列发生器~大家可以作为参考试用看-VHDL-based M-sequence generator ~ everybody can watch the trial as a reference
Signal-generator4
- 基于VHDL语言的函数发生器的设计，基于FPGA的波形发生器-VHDL language based on the design of the function generator
LastTwoModules
- serial reciver in VHDL , first two models ( baud rate generator and Reciver Control )
PARITYGENERATOR
- parity generator implented in 3 models of vhdl
plusewidthmodulationgeneratorqartus
- pluse width modulation generator。基于VHDL语言，PMW波形发生器-pluse width modulation generator VHEL
renyiboxing
- 信号发生器是一种常用的仪器，能够实现各种波形，不同频率的输出，电子测试系统的重要部件。本研究 的数字信号发生器足基于直接数字合成即DDS技术设计的，采用VHDL与C语言相结合的方法，通过查找存储 于ROM查找表中的各种标准波形数据，产牛频率Hf调并且高精度的正弦波、方波、锯齿波等常用信号，并且町 以通过修改表中的数据，实现任意信号发生器-Signal generator is a commonly used instrument to achieve a variety of wav
boxing
- 多功能波形发生器完全设计源代码 VHDL语言设计 -Multi-waveform generator
hang
- 用VHDL编写程序实现VGA彩条信号发生器 显示行彩条-VGA color bar signal generator display line color bar with VHDL programming
sin
- vhdl语言写的基于rom的正弦波发生器，包含代码和仿真图-VHDL language used to write rom-based sine wave generator contains code and simulation Figure
doxygen_manual-1.8.3
- Doxygen是一种开源跨平台的，以类似JavaDoc风格描述的文档系统，完全支持C、C++、Java、Objective-C和IDL语言，部分支持PHP、C#。注释的语法与Qt-Doc、KDoc和JavaDoc兼容。Doxgen可以从一套归档源文件开始，生成HTML格式的在线类浏览器，或离线的LATEX、RTF参考手册。-a code document generator tool for * C/C++ * Java * Objective-C * Python * ID
DDS
- DDS信号发生器设计程序,内含各种増频，转码，变形的VHDL语言-DDS signal generator design process, containing a variety of Increase frequency, transcoding, the deformation of the VHDL language
function-of-fangbozhenxianandsanjiao
- 基于FPGA的函数信号发生器VHDL设计，包括方波、三角波和正弦波-FPGA-based VHDL design function signal generator, including a square wave, triangle wave and sine
VHDL_design
- 本综合实验包括节拍脉冲发生器、键盘扫描显示和八位二进制计数器三个模块。采用VHDL语言为硬件描述语言，Xilinx ISE 10.1作为开发平台，所开发的程序通过调试运行验证，初步实现了设计目标。-This includes comprehensive experimental beats pulse generator, display and keyboard scan eight binary counter three modules. Using VHDL as the hardwar
12
- 在vhdl语言的环境下，自己设计正弦信号发生器，其中也包含一小段c语言程序-In vhdl language environment of their own design sinusoidal signal generator, which also contains a small c language program
Pulse-Generator-Final-Zip
- A VHDL pulse generator that generates customizable square wave pulses on an arbitrary number of channels. Controlled by UART communication through serial port. Tuned for 5ns period clock signal. The pulse width and delay of each channel is fully
generateur_rossel
- this is vhdl program of rosseler chaotic generator 32 bit fixed point.