本综合实验包括节拍脉冲发生器、键盘扫描显示和八位二进制计数器三个模块。采用VHDL语言为硬件描述语言，Xilinx ISE 10.1作为开发平台，所开发的程序通过调试运行验证，初步实现了设计目标。-This includes comprehensive experimental beats pulse generator, display and keyboard scan eight binary counter three modules. Using VHDL as the hardware descr iption language, Xilinx ISE 10.1 as a development platform, the development of the program through the debugger run the validation, the initial realization of the design goals.