搜索资源列表
vga
- VGA驱动及显示程序，用Verilog编写代码实现VGA的驱动和显示，并且提供了测试程序Testbench通过测试能得到正确的时序波形。-the source code for driving VGA and displaying the images,the testbench was offered.
tcc_cdma
- full testbench design including random number generator, the tcc encoder, the tcc decoder and some control logic.
softwaretest
- 浅谈软件测试流程,转自网络，有需要的可以看一下，写的不错-testbench or software test pipeline
testbench_vantage
- 芯片设计验证测试技术方法，基于verilog语言-testbench for ASIC Design, Verilog
chuanbing
- 串并转换器的verilog源代码带testbench文件-String and converter verilog testbench file with the source code
VHDL_io
- 基于VHDL的Testbench读取文件的编写的PDF教程文件，很有用-VHDL Code text_io for the "Simple Test Bench" example VHDL Code about text_io for the "Simple Test Bench" example
fortestbench
- 基于VHDL的Testbench读取文件的编写的PDF教程文件，很有用-VHDL Code text_io for the "Simple Test Bench" example VHDL Code about text_io for the "Simple Test Bench" example
A_Verilog_HDL_Test_Bench_Primer
- 介绍怎么写testbench的好资料，有一定意义-Describes how to write testbench good information, there is a certain sense
test_bench_8bitserialadder
- testbench for 8 bit serial binary adder
Writing-Testbenches--
- 介绍如何使用system verilog搭建testbench。-introduce how to use the system verilog to writing testbench
A-Verilog-HDL-Test-Bench-Primer
- 学习资料：详细说明了如何用Verilog语言编写Testbench文件-Learning materials: detailed descr iption of how to use Verilog language Testbench file
VHDL-file-to-generate-stimulous-from-a-file-and.r
- VHDL file to generate stimulous from a file and : feed it to a testbench-VHDL file to generate stimulous from a file and : feed it to a testbench
ahbTestbench_obf
- Verilog AHB Testbench
RF_TestBench_UG
- RF TestBench programm user guide for configurating Micrels MIRF505/506 Low RF ICs
Xilinx
- XILINX大讲堂、十招加速Vivado IPI设计、Vivado HLS 中指针作为top 函数参数的处理、Vivado HLS 中的浮点设计编码风格与技巧、编写高效Vivado HLS 工程testbench 的三个要素-XILINX auditorium, ten strokes accelerate Vivado IPI design, Vivado HLS deal with top pointer as function parameters, Vivado HLS floating
Janick-Bergeron-Writing-Testbenches-Functional-Ve
- WRITING TESTBENCHES Functional Verification of HDL Models Good Book for testbench
8-fir
- 8阶低通fir滤波器 包含测试testbench文件-8 order low pass FIR filter contains test testbench file
MIPI_Testbench
- MIPI Testbench Northwest Logic
sha1_v01
- sha1_testbench.v -- Testbench with vectors NIST FIPS 180-2 sha1_exec.v -- Top level sha1 module sha1_round.v -- primitive sha1 round dffhr.v -- generic parameterizable D-flip flop library Performance Analysis Performance equa