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pBlazIDE36
- There are literally dozens of 8-bit microcontroller architectures and instruction sets.Modern FPGAs can efficiently implement practically any 8-bit microcontroller, and available FPGA soft cores support popular instruction sets such as
DesignandFPGAImplementationof
- In most cases, a bandpass filter characteristic is obtained by using a lowpass-to-bandpass frequency transformation on a known lowpass transfer function. This frequency transformation controls the location of passband edges and transfer zero
FPGAIMPLEMENTATIONOFATUNABLEBANDPASSFILTER
- Any Band-Pass filter may be converted into a tunable filter with a single tuning parameter through the use of a new Tunable Heterodyne Band-Pass Filter concept in which the frequency of the heterodyne signal is adjusted thereby translating the
GeneratingFPGA-AcceleratedDFTLibraries
- 关于DFT的文章，应用FPGA实现傅立叶变换。-Abstract—We present a domain-specific approach to generate high-performance hardware-software partitioned implementations of the discrete Fourier transform (DFT). The partitioning strategy is a heuristic based on the DFT
fpga
- 十分钟学会Xilinx FPGA 设计，是中文版的，比较详细，很容易上手，供大家学习-10 minutes Society of Xilinx FPGA design, is the Chinese version, more detailed, it is easy to use, for everybody to learn ~ ~ ~
dd
- 设计的随机数发生器可产生两个随机数，由一开关（RIN）进行控制，RIN为1时随机数发生器被清除，RIN为0时随机数发生器将产生1-6的两个随机数，可由LED数码管显示，显示的方式可由设计者自行设计，既可以选择数码管中的任两个LED显示随机数，也可让四位LED同时显示一个随机数（按一定的时间跳转显示）。根据给定的材料完成上述系统的设计，用Xilinx ise完成功能的设计与仿真，并最终下载到目标板XILINX SPARTAN-3 Starter Board上进行验证实现。-The random n
Spartan-3E-Starter-User-Guide
- 本文档是XILINX公司生产的FPGA型号为Spartan-3E 芯片内部结构的详细介绍-This document is a XILINX company FPGA model the details of the internal structure of the Spartan-3E chip
phase_test
- VHDL,简易音频数字相位表的设计与实现 数字相位测量仪在工业领域中经常用到的一般测量工具，主要应用与同频率正弦信号间的相位差的测量显示。 本系统采用FPGA实现测量的核心部分，主要由数字鉴相、累加计数器、控制器以及寄存与显示译码电路组成。该系统硬件电路简单，整个系统采用硬件描述语言VHDL作为系统内部硬件结构的描述手段，在XILINX公司的ISE9.1的软件支持下完成。可以对20Hz~20kHz频率范围内的音频信号进行采样鉴相处理，并将数据传回FPGA进行相位差计数累加、测量运算，最后送显
fft
- fft AND ifft is designed for OFDM application using CORDIC algorithm and implemented in XILINX FPGA.
labsolution
- xilinx大学计划完整实验6个。非常值得学习的资料。-This is the xilinx udp labs designed with VHDL.
ISEuserguide
- ise软件使用说明，对ISE软件的掌握非常有帮助。如果你开发xilinx的FPGA,建议下载。-ise software instructions, the ISE software grasp very helpful. If you develop xilinx' s FPGA, it is recommended to download.
OZ745
- 4k*2K zynq The OZ745 is a video development platform based around the Xilinx® Zynq-7045 FPGA. The kit includes all the basic components of hardware, design tools, IP, pre-verified reference designs and Board Support Package to rapidly devel
Lab05-Chipscope_Debugging_13_1_1
- xilinx fpga microblaze Embedded Chipscope DebuggingThis is the fifth tutorial in a series of training material dedicated to introducing engineers to creating their first embedded designs. These tutorials will cover all the required steps for creating
1111
- Xilinx FPGA设计DDR2接口的方法PPT，介绍的非常详细，值得参考。 -Xilinx FPGA DDR2 interface design method PPT, described in great detail, it is worth reference.
LTE-xilinx_PFGA_reference_design
- xilinx中一整套关于LTE在FPGA下的解决方案，里面涉及到LTE设计的L1层和L2层以及结合其硬件的设计方案和内容，非常利于LTE开发-xilinx set on the LTE solution under the FPGA, which relates to the design of LTE L1 and L2 layers and the combination of the hardware design and content development is beneficial
LTE-xilinx_PFGA_reference_design_all
- xilinx中一整套关于LTE在FPGA下的解决方案，里面涉及到LTE设计的L1层和L2层以及结合其硬件的设计方案和内容，非常利于LTE开发-xilinx set on the LTE solution under the FPGA, which relates to the design of LTE L1 and L2 layers and the combination of the hardware design and content development is beneficial
vga_block2
- 一个xilinx工程，自己做的，主要是在VGA上显示一个动态方块，在屏幕上自由移动，碰壁反弹-A xilinx project, do it yourself, is mainly a dynamic display box on the VGA, freedom of movement on the screen, snags a rebound
latch
- Abstract—Power is becoming a precious resource in modern VLSI design, even more so than area. This paper proposes a novel architecture for modular, scalable &reusable hybrid constant co-efficient multiplier (KCM) circuit. Comparison is made b
piso1
- The following thesis describes the design, the synthesis, and the implementation of pulse width modulation (PWM) in Xilinx Field Programmable Gate Array (FPGA). The contribution of this thesis is the development of PWM in Xilinx
Real-time User Adjustable Video Filtering
- Real-time User Adjustable Video Filtering aim is to create an embedded system that demonstrates real-time video filtering using a Xilinx Virtex II multimedia board