搜索资源列表
move_frequency_arithmetic
- 移频算法描述， 请需要的注意，可以-frequency-shift algorithm descr iptions, the attention can s
SAR_image_processing2
- 文章介绍了合成孔径雷达图象(SAR)的2篇文献.1.生物学中免疫算法在图象分割中的应用 2.地震中的偏移理论在对地灵敏雷达中的应用-article on the synthetic aperture radar images (SAR) of two literature .1. Biology immune algorithm in Figure As segmentation of two. The seismic shift to the right in theory sensitive
JOS
- mean-shift跟踪算法中核窗口大小的自动选区
AnIntroductiontoMeanShift
- 均值漂移算法的详细介绍，论证均值漂移算法的收敛性，介绍mean-shift算法在图像分割，目标跟踪领域的应用
电子拔河
- 电子拔河游戏的实现, 二极管,移位寄存器和计数器的实现-electronic game of tug-of-war to achieve, diodes, shift register and counter the realization
Time-shift.rar
- 流媒体系统，直播时移设计方案，思路以及实现方式等,Streaming media systems, live time-lapse design ideas and implementation methods
GMSK
- GMSK是高斯滤波的最小频移键控的简称，基本的工作原理是将基带信号先经过高斯滤波器成形，再进行最小频移键控(MSK)调制。由于成形后的高斯脉冲包络无陡峭边沿，亦无拐点，因此频谱特性优于MSK信号的频谱特性。-GMSK Gaussian filter is the smallest FSK abbreviation, the basic working principle is to base-band signal to pass Gaussian filter shape, and then
multiply
- With shift add way to implement multiply harware circuit.-There are many design for multiply process.This vhdl code provide parallel circuit to do multiply function.
YDD_ICCV05_HPF
- "Bayesian Mean Shift Face Tracker" This is a paper about tracking by particle filter. This is very useful.
lpm_shiftreg(2)
- shift register with Quartus -shift register with Quartus II
shiftadd
- BOOTH ALGORITM IN VHDL AND SHIFT ADD MULTIPLICATION
PLC-sequential-shift-instruction-control-procedure
- 移位指令实现PLC顺序控制程序的一般方法PLC sequential shift instruction control procedures to achieve a general method-PLC sequential shift instruction control procedures to achieve a general method
minimum-shift-keying
- minimum shift keying modulation
shift-tutorial.ps
- shift tutorial hybrid system
The-right-shift-water-LED
- 通过C语言实现右移运算流水点亮P1口8位LED-The water lit P1 port 8 LED by C language right shift
Carried-Phase-shift-SPWM
- 基于FPGA的多电平载波移相SPWM方法实现-theCarried-Phase-shift SPWM method of Multi-Level converter based on FPGA
SHIFT-RESISTER.tar
- its about a shift register design using verilog and verification using system verilog files for uvm.
120-phase-shift
- 120d phase shift code pic16f
shift-left-register-8-bit
- shift left register 8 bit verilog code
mean-shift-matlab-master5
- mean shift algorithm part3