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ripple-lookahead-carryselect-adder
- Ripple Adder: 16-bit 全加,半加及ripple adder的设计及VHDL程序 Carry Look ahead Adder:4, 16, 32 bits 前置进位加法器的设计方案及VHDL程序 Carry Select Adder:16 Bits 进位选择加法器的设计方案及VHDL程序-Ripple Adder : 16-bit full adder, semi-Canada and the ripple adder design and VHDL procedur
Add64
- arm 上的64位加法，将32位加法扩展到64位，同理很容易扩大到128位-arm of the 64 Adder, 32 Adder expanded to 64, empathy can be easily expanded to 128
sadct
- adi 汇编写的2维FDCT程序,分成两个1D-DCT,每个1D-DCT 使用12次乘法和32次加法-Sa'adi compilation of the two-dimensional writing FDCT procedures, divided into two 1D - DCT. Each one D-12 DCT use multiplication and 32 Adder
add(FLP).32位元的浮点数加法器
- 一个32位元的浮点数加法器，可将两IEEE 754格式内的值进行相加,A 32-bit floating-point adder can be both within the IEEE 754 format to add value
acc32bit 本设计为32位数字相位累加器
- 本设计为32位数字相位累加器，门级描述的Verilog代码。其中，acc32bit.v为顶层文件，full_add1.v为一位全加器的门级描述模块，flop.v为触发器的门级描述模块。-The design for the 32-bit digital phase accumulator, gate-level descr iption of the Verilog code. Which, acc32bit.v as top-level file, full_add1.v as a full
32-float-point-adder
- 32位浮点加法器。我第一次上载源码你就放过我吧，我就是想看一看加法器应该怎么做。-Floating point adder
brentkung_32
- 32 bit brentkung adder tr-32 bit brentkung adder tree
koggestone_32
- koggee stone 32 bit adder
CSLA_32
- 32bit carry select adder
floating-point-adder1
- 基于VHDL语言的32位单精度的浮点加法器-floating point adder based on VHDL
ADDER
- 本设计是用32位的并行全加器的,可以实现浮点运算!-The design is a parallel 32-bit full adder, and floating-point operations can be achieved!
myadd32
- 32位全程加法器，可以进行移位操作及多位多输入多输出加减法-32-bit full adder, shift operations can be carried out and a number of multiple-input multiple-output addition and subtraction
adder
- 8位cla，采用for结构，可以扩张成32位或者16位-8 cla, used for the structure, you can expand into a 32-bit or 16-bit
adder
- 本设计是做了一个32位超前进位加法器，能够快速计算-This design is made of a 32-bit lookahead adder, to quickly calculate
Floating-Point-Adder
- 浮点数加法器IP核的vhd设计。浮点数加法运算是运输中使用最高的运算，结合vhdl和EPGA可编程技术，完成具有5线级流水线结构、符合IEEE 754浮点标准、可参数化为单、双精度的浮点数加法器。-Floating point adder design IP core vhd. Floating-point addition operation is used in most transport operations, combined with vhdl and EPGA programmab
Adder_Kogge_Stone_32bit_With_Test_Bench
- verilog source code and test bench of Adder Kogge Stone 32-Bit
brentkung_16
- 16位的brentkung加法器树，在xilinx软件下-16-bit brentkung adder tree, under the xilinx software
32-rip-adder
- A ripple carry adder allows you to add two 32-bit numbers
adder
- adder 32 is very easy to use adder 32 is make up by 4 adder 4 and i have nothing to say already~!
adder_32bits
- 32位进位选择加法器，预置逻辑0和逻辑1，各模块并行运行，只要通过进位位选择逻辑0或者逻辑1即可，提高了运行速度。-32-bit carry select adder, preset logic 0 and logic 1, the modules run in parallel, as long as through the carry bit selection logic 0 or logic 1 can improve the speed.