搜索资源列表
serweb
- 小型的Windows上的web server -A small web server on windows
JobSites
- 该压缩包内包含了一个完整的.net C#网站,主要实现了会员登陆,求职信息发布和招聘信息发布等功能.代码架构非常清晰 <DIR> Admin <DIR> App_Code <DIR> App_Data <DIR> App_Themes 562 changepassword.aspx 450 changepassword.aspx.cs 404 customerrorpage.aspx 305 customerrorp
IEEE_754_Floating_Point_Conversion_from_floating_
- IEEE-754 Floating-Point Conversion From Decimal Floating-Point To 32-bit and 64-bit Hexadecimal Representations Along with Their Binary Equivalents
GF8051
- Go Fast Floating Point libraries for double float operations bit shifted on an 8bit microcontroller. Includes C and ASM source code, libraries and documentation for Franklin Kiel embedded C compliler.
birdphoto_3.0flashfree
- 飞鸟相册 更改相册首页图片 /Skins/default/img_index.jpg (只要把这张图片替换成你的首页图片就可以了 一般尺寸：754*360) /Skins/default/index.xml皮肤配置文件 后台管理地址：/admin/index.asp 用户名：admin 密码：admin 注意：后台--》管理员工具--》系统参数设置里 如果你的服务器不支持的组件全 “关闭”-Asuka Album Change Album H
fpu100_latest.tar
- 这是一个32位的浮点运算单元（FPU），它可以根据IEEE754标准被完全编译。此FPU已被硬件测试和被软件仿真通过。-This is a 32-bit floating point unit (FPU),It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Standard. The FPU was tested and simulated in h
Floating-Point-Adder
- 浮点数加法器IP核的vhd设计。浮点数加法运算是运输中使用最高的运算，结合vhdl和EPGA可编程技术，完成具有5线级流水线结构、符合IEEE 754浮点标准、可参数化为单、双精度的浮点数加法器。-Floating point adder design IP core vhd. Floating-point addition operation is used in most transport operations, combined with vhdl and EPGA programmab
fp_mul
- float-point multiplication standart IEEE-754
CPU_voltage_tool
- Intel 479, AMD 939, LGA775, AMD 940, AMD 754, Intel 478, AMD 462, AM2 VID s location
fpu100_latest.tar
- This a 32-bit floating point unit (FPU), which I developed in a project within the Vienna University of Technology. It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Standard-This is a 32-bit floating
CORDIC_FPGA
- 摘要：本文在传统CORDIC算法的基础之上，通过增加迭代次数，对参数进行了优化筛选， 提高了运算精度，使设计出的软核能够在精度要求较高的场合中运行，如实时语音、图 像信号处理、滤波技术等。输出数据经过IEEE-754标准化处理，能够直接兼容大多数处 理器，扩展了其应用范围。最终在Altera公司NiosⅡ处理器中通过增加自定义指令的方 式完成了硬件实现。 关键字：CORDIC ,自定义指令, IEEE-754标准化处理。-Abstract: In this paper, ba
emiraga-ieee754-verilog-b7a63aa
- IEEE 754 floating point
GGHGGG
- 三星单片机(276754866)1621显示-Samsung MCU (276,754,866) 1621 shows
IEEE754-to-Single
- 按照IEEE 754规定的数值格式，把浮点数转换为十进制显示形式。-According to the values specified in IEEE 754 format floating point numbers to decimal display the form.
Float_point
- 浮点数加/减法器的设计 规格化的浮点数运算器 IEEE标准754 单精度-Floating-point add/subtract device design normalized floating-point arithmetic unit single-precision IEEE Standard 754
sqrt-base-on-fpga
- 对一种改进的不恢复余数的开方算法(non - restoring square - root algorithm)进行了讨论 ,并将其应用于基于 IEEE 754 标准的32 位浮点格式的开方运算中 ,以一款 FPGA 为载体 ,实现了进行运算的基本电路。对目前存在的几种开方 算法进行了评述 ,分析了他们的优缺点 ,提出了改进的不恢复余数开方算法模块化的设计思路与关键电路 ,并分析了仿真和 逻辑综合的结果 ,证明了该算法运算速度较快且占用资源极少的特点。-An improved no
IEEE754_float-type
- 解读IEEE标准754：浮点数表示，及IEEE754标准的转换-Interpretation of IEEE Standard 754: floating-point representations, and the IEEE754 standard conversion
Handbook-of-Floating-Point-Arithmetic---Birkhause
- Floating-point arithmetic (2008), ADD, SUB, MUL, SQRT, FUNCTION (IEEE 754-1985 Standard, IEEE 854-1987 Standard, New IEEE 754-2008 Standard)-Floating-point arithmetic (2008), ADD, SUB, MUL, SQRT, FUNCTION (IEEE 754-1985 Standard, IEEE 854-1987 Stand
floating_point_multiplier_verilog
- This code has written in verilog and it can multiply two floating point number with IEEE 754 standards and the out put of this code is in IEEE 754 standard.We have to put input in binary and the out put is also in binary.