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xapp355
- Serial ADC Interface write in VHDL based on xilinx cpld
CORE8051_ADC_OK_328
- 这是一个在Fusion系列的AFS600的FPGA，在里面嵌入51核和12位adc模块，可以在lcd12864上显示，能正常转换电压。做adc使用。-This is a AFS600 at the Fusion series FPGA, embedded in which 51 nuclear and 12-bit adc module, you can show up at lcd12864 to the normal voltage conversion. Does the use of a
ADC0809
- 模数转换器件ADC0809的详细中文资料，附VHDL语言编写的基于FPGA的ADC0809控制设计代码-ADC0809 ADC detailed pieces of information in Chinese, with VHDL language ADC0809 based control design of the FPGA code
adc
- vhdl实现对模数转换芯片adc0832的控制,程序采用的是状态编码输出.-VHDL realization of analog-digital conversion chip adc0832 control, procedures using state of the output encoding.
ADC_INTERFACE
- it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit. -it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix i
adc7656
- This file is used in ADC 7656 interface.
vhdlcode
- VHDL code in ISE (for collecting the ADC samples from kit and for viewing final output)
adc2
- ADC control in VHDL language. Spartan 3E starter pack ISE 10.1
memtest
- 在数字系统中，一般存在多个芯片，利用不同的特点用于实现不同的功能，一般都包含CPU,FPGA,AD,DA,memory，ASSP（专用标准模块）,ASIC等。CPU用于进行智能控制，FPGA进行硬件算法处理和多设备接口，AD进行模数转换，DA进行数模转换，memory存储临时数据。因此，FPGA如何与其他芯片进行通讯是重要的设计内容。数据输入，数据输出，双向通讯，指令传递，地址管理，不同时钟的异步通讯问题等等都需要处理。最基本的MEMORY如SRAM(128KX8bbit静态存储器628128)
simple_spi
- complete spi core written in vhdl. its easy to use and can be configured to operate at various clock frequencies. tested on an ADC to verify the operation
AD1674
- This is an interface in HDL for the AD1674 ADC converter.
adc
- adc code in vhdl. by suman, praveen
decimator
- Digital filter in delta-sigma ADC. But only work for RTL code now. Still have bugs in gate-level simulation.
adfmreceiver
- The design of the All Digital FM Receiver circuit in this project uses Phase Locked Loop (PLL) as the main core. The task of the PLL is to maintain coherence between the input (modulated) signal frequency,iωand the respective output frequency,oωvia p
State_Machine
- 状态机的VHDL实现，在quartus-ii7.2上测试通过，文件包括米利状态机，摩尔状态机，ADC0809的状态机实现，序列检测器和定时去毛刺的状态机实现。-State machine code in VHDL,successfully tested in quartus-ii7.2,the file contains mealy state machine,moore state machine,ADC 0809 and sequence detector achieved in state
ADC
- analog to digital converson programmed in VHDL
SAR-ADC
- 这是一个用于实现逐次逼近型ADC的控制程序，用状态机实现的，用的VHDL语言。在实际项目中测试过-This is a successive approximation type ADC control program, written using the state machine tested in the actual project
adc
- 很好的fpgaADC资料，用VHDL编写。可以测量波形的峰峰值及频率，并在数码管上显示-Good fpgaADC information with VHDL. Can measure the waveform peak to peak, and frequency, and in the digital display
1324-f4rt
- The VHDL code presented in this model will enable you to see how to create behavioural ADC
ADC-ADS7230
- ADC ADS7230 - ADC module in VHDL for ADS 7230 (Texas Instruments)