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HDB3
- 源于老师的作业,实现将01代码转化成HDB3码,另外还有用VHDL语言编的,不过我这没有-teachers from the operations, achieving 01 HDB3 code into the code, as well as using VHDL series, but I am not
MC1496
- 使用MC1496实现AM调制的PDF格式说明书。-AM modulation using MC1496
vhdlcodes
- with this rar file i am sending five source codes in vhdl for xor gate,xor gate using tristae gate,electronic voting machine,mod 16 counter,jk flip flop.please accept these codes and make me member of this site.so that i can download code from this s
zd
- 我的课程设计内容的一部分 很好用的 vhdl语言 -I am a part of the content of the curriculum design using vhdl language well
AM_VHDL
- AM Demodulator using VHDL for Xilinx FPGA. ISE software
fir
- 数字电路设计中的，fir滤波器设计，我做的是8位宽的，利用vhdl实现，附带了完整的代码，报告，我没有对我的信息进行删除，是希望大家能够诚实的利用这个代码，提高自身本领。-Digital circuit design, fir filter design, I am doing is 8 bits wide, using vhdl implementation, with a complete code, the report, I did not delete my information i
dds_final
- 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjusta
dayin
- 该程序利用vhdl语言，采用查表法实现am调制，此方法简洁又有效-The program using vhdl language, using look-up table method to achieve am modulation, this method is simple and effective
Fuzzy_Image
- A IEEE Paper for Noise Removal using Fuzzy is solved partially using VHDL, with my understanding the matlab tool is much easy to implement this but i tried and successfully completed, now i am revealing it partially for understanding-A IEEE Paper for
ZHWX
- DDS 产生正弦信号，OOK，AM三种波形。 使用xilinx FPGA VHDL-DDS. Resulting in sinusoidal signal, OOK, AM three waveforms. Using xilinx FPGA VHDL.