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fifo_crate
- 基于arm9与fapa的fifo的驱动以及测试程序-Fapa based on the fifo and arm9 driver and test procedures
clock
- 基于fapa应用verilog语言实现多功能数字时钟-Verilog language based fapa application multifunction digital clock
projection1
- 自适应滤波的很多经典算法以及一些新的算法，FAP,APA,FAPA,RLS,LMS,NLMS-Many classical adaptive filtering algorithms as well as some new algorithms, FAP, APA, FAPA, RLS, LMS, NLMS
ise
- 在ise软件上，用VHDL语言，设计的数字跑表，可以两位计数，含分频器，计数器(In the ISE software, using VHDL language digital stopwatch design, can two counts, including frequency divider, counter)