搜索资源列表
hdb3
- 在VHDL平台上实现HDB3编码的源程序已调试完
hdb3
- HDB3码的VHDL实现 共三个模块：插入V、插入B以及单双极性变换
hdb3 decoder
- 我上期做的VHDL设计方案，用于在FPGA或CPLD中实现HDB3的编码-I do view on the VHDL design options for the CPLD or FPGA to achieve HDB3 code
HDB3
- 源于老师的作业,实现将01代码转化成HDB3码,另外还有用VHDL语言编的,不过我这没有-teachers from the operations, achieving 01 HDB3 code into the code, as well as using VHDL series, but I am not
各种码型变换
- 基于vhdl语言的各种码型变换，包括AMI、HDB3、CMI BPH、RZ、BNRZ等。
HDB3
- HDB3码的编码，图形，功率谱密度。用于通信原理教学等-Code HDB3 coding, graphics, power spectral density. Communication Theory for teaching
hdb3
- vhdl语言实现的hdb3编解码的功能，已完成调试。-vhdl
HDB3
- 实现HDB3编码,使用VHDL语言，-1用01表示，1用10表示，0用00表示。-The realization of HDB3 encoding, the use of VHDL language, 01 indicated by-1, 1, 10, said that the 0 with 00.
hdb3
- 基于vhdl的hdb3编译码器的设计与实现-hdb3
HDB3
- VHDL语言编写的HDB3码的编译码模块-VHDL language code HDB3 codec module
HDB3_coder
- 实现了将64K低速NRZ码复接成2.048M高速HDB3码及其解复接过程，同时还用同步状态机剔除假同步和假失步的状态 -Achieved the 64K low-speed NRZ code 2.048M into high-speed multiplexing and demultiplexing HDB3 code then the process also removed using false synchronous state machine synchronization and f
HDB3
- HDB3编码器与译码 HDB3编码器与译码-HDB3 encoder and decoder
hdb3_decode
- hdb3码的编码及解码代码，包括模块连接。-hdb3 code encoding and decoding code, including modules.
hdb3_codedecode
- 用VERILOG实现的，hdb3编码器和解码器，经过前仿真和后仿真成功-Achieved with the VERILOG, hdb3 encoder and decoder, after a successful pre-simulation and post simulation
HDB3
- HDB3编解码过程，本代码用vhdl语言书写，重现了HDB3编解码的详细过程。相信对广大写硬件语言的朋友有好处-HDB3 code and decode
HDB3
- hdb3键盘接口VHDL程序，经过严格仿真，很有参考价值。-HDB3 VHDL keyboard interface program, after a rigorous simulation, of great reference value.
HDB3-VHDL-code
- HDB3的VHDL语言描述，注释在文件内-HDB3 source code in VHDL
HDB3
- 按照要求对“数字基带信号HDB3译码器设计与建模”进行逻辑分析，了解HDB3译码器译码原理，了解各模块电路的逻辑功能，设计通信系统框图，画出实现电路原理图，编写VHDL语言程序，上机调试、仿真，记录实验结果波形，对实验结果进行分析。(In accordance with the requirements of the logical analysis of the design and modeling of the digital baseband signal HDB3 decoder, H
EDA
- 本设计是在Quartus ii开发环境下采用VHDL语言实现的AMI/HDB3编码器课程设计。(This design is a course design of AMI / HDB3 encoder implemented by VHDL language in the development environment of Quartus II.)