搜索资源列表
UART
- Verilog实现的UART程序，用ISE打开工程文件即可-Verilog implementation UART program, open the project file with the ISE can be
USB
- Verilog实现的USB程序，用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
EDA
- VHDL上机手册（基于Xilinx ISE） ___________________________________________________ 1 ISE 软件的运行 2 创建一个新工程 3 创建一个VHDL源文件框架 4 输入VHDL程序 *5 仿真 6 创建Testbench波形源文件 7 设置输入仿真波形 -eda
fpga
- fpga数字电子系统设计与开发 ISE I2C UART usb vga -ISE I2C UART usb vga
Multiplier
- It s a design of a 4*4 multiplier based on Verilog, using Xilinx ISE.
Xilinx_ISE_Tutorial
- A brief but very useful tutorial for the Xilinx ISE.
I2C
- 用verilog编写实现的I2C协议源码，自带控制台，解压后用ISE打开工程文件即可。-Prepared achieved with the I2C protocol verilog source code, comes with the console, after decompression project file can be opened with the ISE.
UART
- 用VHDL编写实现的UART控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the UART controller, bring their own testbench, after decompression project file can be opened with the ISE.
USB
- 用VHDL编写实现的USB接口控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the USB interface controller, bring their own testbench, after decompression project file can be opened with the ISE.
canbus
- 用verilog编写实现的CAN总线控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the verilog source code to achieve the CAN bus controller, bring their own testbench, after decompression project file can be opened with the ISE.
mac_controller
- 用verilog编写实现的以太网控制器（MAC）源码，解压后用ISE打开工程即可。-Prepared using verilog implementation Ethernet Controller (MAC) source code, open the project after decompression can be used ISE.
ISE9.1user_guide
- ISE9.1 user guide ISE开发环境使用指南-ISE9.1 user guide
tutorial
- 计数器 平台：Xilinx ise 10.1 说明：和ise10.1快速帮助手册配套的源码，适用于初学者。-counter platform: Xilinx ise 10.1 comment: supplement to ise quick start tutorial 10.1, suitable for freshman to fpga and ise software.
s3esk_startup
- 利用kcpsm3控制lcd显示 平台：ise 10.1， picoblaze， Spartan3e 开发板 说明：综合按键和lcd、led的功能，思想简单，需要新技术，适合想在fpga方面深造的人。-using kcpsm3 for lcd display platform: ise 10.1， picoblaze， Spartan-3E FPGA Starter Kit Board comment: involve lcd/led/switch, simple mind bu
Receiver
- 基于802.11a的OFDM基带硬件设计的verilog代码，在Xilinx ISE环境下实现-The OFDM-based 802.11a baseband hardware design of the verilog code, in the Xilinx ISE environment to achieve
yiweiDCTbianhuan
- 一维DCT变换的Verilog HDL源程序，在ISE中已经通过编译，可以参考里面的文档。-One-dimensional DCT transform Verilog HDL source code, in the ISE has been through the compilation, you can refer to inside the document.
CFO_Correction
- 载波频率同步Verilog程序 基于xilinx ise 实现-Carrier frequency synchronization Verilog program is based on xilinx ise to achieve
AM_VHDL
- AM Demodulator using VHDL for Xilinx FPGA. ISE software
keygen
- ISE 9.2 serials working
Processor_alu
- this Code is in verilog HDL. This Code is for piplined processor with 4 opcode. this will work in three cycle latch, decode and exicute.. test bench for xilinx ise is laos given