搜索资源列表
rs-code
- 基于PLD的RS码编译码器设计,用VHDL语言编写,编译通过,测试结果正确。
uart_transmitter
- Very good info. for RS-232 transmitter VHDL code .
uart_receiver
- Very good info. for RS-232 receive VHDL code .
ECHO_DE2
- Very good info. for RS-232 echo VHDL code .
RS-code
- 我测试过的!Verilog HDL实现RS编码。-I' ve tested it! RS coding Verilog HDL implementation.
RS485EN
- RS485的双向通信处,正在为此头疼的同学们可要注意了,这个可以解决你们双向通信过程中的很多问题哦-Two-way RS485 communications, the headache is to this end they' ll pay attention to the students, this two-way communication you can solve many problems in the course of oh
rs-codec-8-16
- RS[255,223]纠错码verilog源码,包含编码和解码模块,以及testbench等。-Verilog source code for RS[255,223] encoder and decoder, with testbench included.
rs_encode
- 这是用verilog编写的RS(204,188)代码,适用于数字电视的BCH编码过程。-This is the verilog prepared using RS (204,188) code, the application of digital television in the course of the BCH code.
RS_Verilog
- rs编解码的verilog实现源代码,从硬件实现rs的编解码-rs codec to achieve the verilog source code, from the hardware codec rs
RS_Verilog
- RS码的FPGA实现,verilog语言形式,好参考资料-FPGA realization of RS code, verilog language form, a good reference
RS
- reed selemon encoder vhdl code
RSverilog
- RS译码主要模块的verilog代码,很有用也很实用的,需要的一定要看哦-RS decoding main modules of the verilog code, very useful and very useful, and we need to look at Oh sure
DVB
- DVB系统中交织器和解交织器设计的FPGA实现-DVB system, the reconciliation Interleaver Interleaver design FPGA implementation
RS-5-3-CODE
- RS(5,3)编码器原程序 程序已经调试过 且比较简短-RS(5,3) coder ,this code is very short
RS
- RS编码器的VHDL源程序,程序有点大,不过能用。-RS encoder VHDL source code, program a little big, but can be used.
RS3123
- Reed- So lomon (RS) 码是一种重要的纠错码, 它对随机性和突发性错误有极强的纠错能力, 广泛应用于 数字视频广播(DVB) 系统和其它数字通信领域。给出了一种GF (25) 域上的RS (31, 23) 编码器的实现算法, 介绍 了用现场可编程门阵列(FPGA ) 实现RS 编码器的原理和过程, 并给出了实现电路及其仿真的输出波形。-Reed-So lomon (RS) code is an important error-correcting code, its ra
RS
- 基于FPGA的RS编码,包括RS码的编码原理,RS电路的设计与实现-FPGA-based RS code, including the RS, the coding principle, RS Circuit Design and Implementation
RS
- RS译码器的设计,使用RS码设计的译码器-RS decoder design, the use of RS code decoder design
rs(31-19)
- 本源代码是RS(31,19)编码器的顶端实现程序和测试程序,此程序可以验证编码器工作与否。此代码,已在ModelSim验证通过。并附上测试时所产生的结果图像。-Source code is RS (31,19) encoder to achieve the top programs and testing procedures, this program can verify the encoder to work or not. This code has been verified in M
rs-code
- VHDL Code for D-Flip Flop & Matching Unit