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  1. 8051core_vhdl

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  2. 8051的内核(vhdl) This is version 1.1. of the MC8051 IP core. 在FPGA上运行.供有精力的人研究.-8051 kernel (vhdl) This is version 1.1. Of the M C8051 IP core. FPGA operation. have the energy for the study.
  3. 所属分类:VHDL编程

    • 发布日期:2008-10-13
    • 文件大小:213197
    • 提供者:efly
  1. yinpinfenxiyi

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  2. 大学生电子竞赛论文报告-音频信号分析仪。主要利用频谱分析原理,频谱分析是把信号的能量用频率的函数显示出来-Undergraduate Electronic Thesis Competition Report- audio signal analyzer. The main principle of the use of spectrum analysis, spectrum analysis is used to signal the frequency of the energy functi
  3. 所属分类:SCM

    • 发布日期:2017-03-29
    • 文件大小:126157
    • 提供者:song
  1. Robotic_Exploration_and_Landmark_Determination_us

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  2. Sensing and planning are at the core of robot motion. Traditionally, mobile robots have been used for performing various tasks with a general-purpose processor on-board. This book grew out of our research enquiry into alternate architectures fo
  3. 所属分类:software engineering

    • 发布日期:2017-05-06
    • 文件大小:1348579
    • 提供者:moatasem momtaz
  1. EnergyEfficientVLSIArchitectureforLinearTurboEqua

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  2. Energy efficient for turbo encoder decoder
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-08
    • 文件大小:537061
    • 提供者:suresh
  1. IterativeDecodingofBinary

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  2. In this paper, energy efficient VLSI architectures for linear turbo equalization are studied. Linear turbo equalizers exhibit dramatic bit error rate (BER) improvement over conventional equalizers by enabling a form of joint equalization and deco
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-03
    • 文件大小:1515947
    • 提供者:suresh
  1. MapAlgorithm

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  2. However, turbo equalizers can be computationally complex and hence require significant power consumption. In this paper, we present an energy-efficient VLSI architecture for such linear turbo equalizers. Key architectural techniques include elimi
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-03
    • 文件大小:1315651
    • 提供者:suresh
  1. VerilogLangRefManual

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  2. Simulation results show that energy savings in the range 30–60 and 10–60 are achieved in equalization and decoding, respectively. Furthermore, we present finite precision requirements of the linear turbo equalizer and an efficient rescaling metho
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-03
    • 文件大小:1283063
    • 提供者:suresh
  1. wireless

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  2. prohect energy efficient algorithm for wireless sensor network
  3. 所属分类:Communication

    • 发布日期:2017-05-11
    • 文件大小:2314335
    • 提供者:atul
  1. ADC_TLC549

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  2. TLC549的VHDL驱动源码 已测试通过的TLC549的驱动源码 有转换使能和转换完毕标志-TLC549 the VHDL source code has been test driving the driving source through the TLC549 has converted to energy and the conversion complete flag
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:826
    • 提供者:123
  1. GeneratingFPGA-AcceleratedDFTLibraries

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  2. 关于DFT的文章,应用FPGA实现傅立叶变换。-Abstract—We present a domain-specific approach to generate high-performance hardware-software partitioned implementations of the discrete Fourier transform (DFT). The partitioning strategy is a heuristic based on the DFT
  3. 所属分类:Project Design

    • 发布日期:2017-03-29
    • 文件大小:235386
    • 提供者:李然
  1. five

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  2. 并入串出寄存器完成双向含异步清0和同步时钟使能的4位加法器的VHDL描述,并对其进行波形仿真,确定结果正确。- Incorporated into the string to the register to complete the two-way with asynchronous clear and synchronous clock so that the VHDL descr iption of the four adder energy and waveform simulatio
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-17
    • 文件大小:10289
    • 提供者:qsp
  1. saomiao

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  2. 基于vhdl语言的数码管动态扫描显示程序代码,同时加有数码管闪烁,超欠量程的led灯显示报警附加动能-Vhdl language-based digital control of dynamic scanning display program code, while adding a digital tube flashes, over and under range of led lights display alarm additional kinetic energy
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-06
    • 文件大小:1011
    • 提供者:郭悦
  1. DAIMA-BLACK

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  2. VHDL 语言的 能量感知的基础算法及sin 查表法 HEX,9-256-Energy VHDL language and perception on the basis of the algorithm sin lookup table HEX ,9-256
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-13
    • 文件大小:2387
    • 提供者:涂欣
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