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2下载：
jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
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BCD转BIN算法，BCD码转二进制数据。,BCD to BIN algorithm, BCD code to binary data.
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Cordic算法实现DDS的Verilog 源码,14位精度，非常实用的。-DDS algorithm Cordic the Verilog source code, 14-bit accuracy, very practical.
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一个不错的关于lms算法的verilog代码，算然只有两级，但是对了解lms用HDL描述有很好的理解作用。希望对大家有用~-A good lms algorithm on the verilog code, development environment, I can not find, even if the vhdl it! We hope to be useful
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用verilog HDL实现自相关算法！
RTL级可综合代码！
通过modelsim5.6仿真和quartusii7.1综合！-Verilog HDL using auto-correlation algorithm to achieve! RTL-level code can be integrated! Through simulation and modelsim5.6 integrated quartusii7.1!
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fft代码,采用蝶形算法,包括C,matlab和verilog代码-fft code, using butterfly algorithm, including C, matlab and Verilog code
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本人自己写的可实现512点或64点IFFT算法的verilog硬件代码-the verilog code for IFFT algorithm
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基于FPGA的AES算法实现的VERILOG源代码，对于信息安全专业研究AES算法的硬件实现很有用-FPGA-based AES algorithm implementation VERILOG source code, for the information security professional research of the hardware implementation of AES algorithm is useful
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MD5算法verilog代码，很不错的，可以互相交流学习-MD5 algorithm verilog code, and a very good
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verilog code for division based on cordic algorithm
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无线通信中的常见通信算法处理verilog代码，对于通信硬件实现研究非常有用！-Wireless communications in the algorithm to deal with common communications verilog code for hardware implementation of communication research is very useful!
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2下载：
一个不错的关于lms算法的verilog代码，算然只有两级，但是对了解lms用HDL描述有很好的理解作用。希望对大家有用~-A good lms algorithm on the verilog code, development environment, I can not find, even if the vhdl it! We hope to be useful
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this the verilog code that performs the modulus function ... most importantly it is synthesisable... uses the repeated sub algorithm-this is the verilog code that performs the modulus function ... most importantly it is synthesisable... uses the repe
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高级加密标准aes加密算法用fpga实现的Verilog源代码。-Advanced encryption standard aes encryption algorithm using fpga implementation Verilog source code.
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DES加密算法的VHDL和VERILOG源程序- Xilinx开源共享61EDA代码工厂-DES encryption algorithm of VHDL and VERILOG source code- Xilinx factory open source code sharing 61EDA
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Mpeg4图象编解码算法原程序，基于VC。-Mpeg4 decoding algorithm for the original process image, based on VC.
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CORDIC算法设计的数字计算机，基于Verilog设计-CORDIC algorithm based on the design of digital computer, Verilog design code
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verilog code for factorial algorithm
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finite impulse response LMS algorithm verilog code
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VERILOG CODE FOR 16 BIT MULTIPLIER USING MODIFIED BOOTH ALGORITHM
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