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DDS_信号源
- dds 精确步进100HZ.拨码开关选择FSK,FM等功能.最高频率25M,DA芯片9760.VHDL编写
verilog实现FSK
- 用verilog语言，采用DDS技术实现的FSK
ask.rar
- 用简单的DDS方法产生的波形来调制ASK以及FSK,使其调制更简单,The DDS with a simple way to generate the waveform modulation ASK, PSK, FSK, make it more simple modulation
fpga-fpdpsk
- FSK/PSK调制顶层文件 ，正弦波模块 ，正弦波模块初始化文件 ，振幅调整及波形选择模块 ，频率显示值地址产生模块 ，频率步进键核心模块 ，弹跳消除电路-FSK/PSK modulation top-level documents, sine-wave modules, module initialization file sine wave, amplitude adjustment and waveform selection module, the freque
FSK
- 本代码是用单片机控制DDS芯片输出DDS信号 。该信号包括FSK调制信号和线性调频信号-This code is used to control single-chip DDS chip DDS output signal. The signal including the FSK modulation signal and linear FM signal
DDS-baseddesignofthesinusoidalsignalgenerator
- 本设计采用AT89552单片机，辅以必要的模拟电路，实现了一个基于直接数字频率合成技术(DDS)的正弦谊号发生器。设计中采用DDS芯片AD9850产生频率1KHZ~10MHZ范围内正弦波，采用功放AD811控制输出电压幅度， 由单片机AT89S52控制调节步进频率1HZ。在此基础上，用模拟乘法器MC1496实现了正弦调制信号频率为1KHZ的模拟相度调制信号；用FPGA芯片产生二进制NRZ码,与AD9850结合实现相移键控PSK、幅移键控ASK、频移镇键FSK。-AT89552 the singl
dds_9760_ALL1
- DDS频率精确步进100HZ，拔码选择FSK，PSK，FM，ASK功能。-dds base on vhdl
FSK
- 基于DDS的FSK调频，通过控制频率控制字1和频率控制字2来实现不同频率选择-DDS-based FSK FM, by controlling the frequency control and frequency control word 1 word 2 to achieve different frequency selection
ddsmodem
- modem ask, fsk, psk program susing DDS
DDS
- DDS 用VHDL写的输出的正弦波程序 调频 调幅 调相-DDS WRITE IN VHDL ,including FSK ASK
DDS(fsk-ask-psk)
- 基于VHDL的波形调制，其中包括调频、调幅，调脉宽等-VHDL-based waveform modulation, including FM, AM, pulse width modulation
DDS
- 能在DDS中用Verilog HDL语言实现FM,AM,FSK,ASK,PSK，结合可编程器件FGPA等等就能实现这些功能 -DDS can be used in Verilog HDL language FM, AM, FSK, ASK, PSK, etc. FGPA programmable devices can be combined to achieve these functions
DDS
- 在FPGA里面实现DDS的功能，输出正弦、三角波、方波、FSK/ASK/BPSK调制波等-Inside the FPGA realization of DDS function, the output sine, triangle wave, square wave, FSK/ASK/BPSK modulation wave
AD9854_test(sin_cos-ask-psk-fsk)
- 基于单片机的dds信号设计,用的芯片是AD9854，程序完善-Dds signal based on single chip design, chip AD9854, perfect program
fsk
- 使用quartus13.0 搭建的FSK调制解调仿真系统使用了DDS技术和正交相关解调。-Quartus13.0 built using FSK modulation and demodulation simulation system uses DDS technology and quadrature coherent demodulation.
FSK
- 本程序用VHDL语言基于DDS的原理实现了FSK调制-This procedure using VHDL language is based on the principle of DDS achieve FSK modulation
2fsk_0516
- 运行于Altera Cyclone FPGA平台,基于DDS原理的FSK信号发生器，可产生FSK信号-Running on Altera Cyclone FPGA platform, based on the principle of DDS FSK signal generator for FSK signal
fsk
- 基于fpga的DDS实现,可以实现1hz-40Mhz的正弦信号，方波信号，锯齿波信号，三角波信号等的输出-DDS fpga-based implementation can be achieved 1hz-40Mhz sine signal, square wave signal, sawtooth signal, the output of the triangular wave signal, etc.
9854 RAM FSK（扫频）
- 通过单片机控制DDS模块AD9854进行扫频(DDS module AD9854 is controlled by single chip microcomputer to sweep frequency)
FSK调制的FPGA实现
- 使用DDS核实现cpfsk的VHDL设计，采样频率fs为32Rb