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xtp051_sp601_schematics
- Xilinx公司最新的Spartan 6系列FPGA所用的开发板电路图，详尽包括了电源、IO、外设、USB等部分的内容，极具有参考价值，另外还有一个USB芯片 68013所使用的HEX文件可供下载-Xilinx' s new Spartan 6 Series FPGA development board used in circuit detail, including the power, IO, peripherals, USB and some other content, most
xapp224[1]
- xilinx hdmi rx data recover
xapp861[1]
- xilinx hdmi rx data recover
xapp460
- xilinx hdmi tx rx verilog code datasheet
xapp460
- xilinx hdmi tx rx verilog code
xapp495
- 居然没有找到verilog 这是xilinx的一个hdmi的标准核 我测试使用通过-Actually did not find verilog xilinx an hdmi standard nuclear my test use by
i2c_slave
- i2c slave interface， use xilinx fpag HDMI SDI-i2c slave interface
test_vedio
- xilinx hdmi output yuv4:2:2 sd
hdmi_20130227
- (1)包含驱动HDMI编码芯片Sil9134的时序逻辑和寄存器初始化代码，输出测试图像格式为1080P@30Hz；（2）使用Vivado2013.3开发，硬件平台为威视锐Zing开发板，搭载Xilinx Zynq7020芯片。-(1) contains drivers HDMI encoder chip Sil9134 timing logic and register initialization code, output test image format 1080P @ 30Hz (2)
GEN_HDMI
- 基于XILINX SOC的HDMI配置的SDK工程和IP核，用于HDMI芯片的配置-XILINX SOC based on the HDMI configuration SDK engineering and IP cores for HDMI chip configuration
hdmi_xps
- 基于XILINX SOC的HDMI配置最小系统IP核和SDK工程，用于进行HDMI芯片的配置-Configuring an HDMI chip XILINX SOC minimum system configuration of HDMI IP core and SDK works for
tmds_decoder
- Tryout HDMI decoder for Xilinx-based boards, using SERDES logic. Different implementations.
HDMI_test
- 基于Xilinx的FPGA的spartan3的HDMI测试功能刷屏显示。-Based on Xilinx s FPGA spartan 3e of the HDMI display refresh function tests.
mys-xc7z020-arm-hdmi-xylon
- Zturn board verilog source with HDMI driver.
cam2hdmi_top
- camera to hdmi verilog code for xilinx fpga
12_hdma_in_out
- 基于xilinx的Artix7实现HDMI的输入输出(Xilinx based Artix7 implementation of HDMI input and output)
xapp495(1)
- 实现HDMI的receiver和transmitter，来源xilinx xapp(Implement HDMI interface 1.0, including receiver and transmitter,from Xilinx xapp)
tx
- 一个用verilog实现的HDMI发送器，已在XILINX的7系列FPGA上验证(A HDMI transmitter implemented by Verilog has been verified on XILINX's 7-series FPGA)
hdmi
- 滚动彩条显示。通过HDMI接口输出单色图案、渐变色、单幅马赛克、动态马赛克等图案。使用Verilog，基于Xilinx Spartan-6 LX45器件，AX6045开发板(Scroll bar display. Through HDMI interface output monochrome pattern, gradient color, single mosaic, dynamic mosaic and other patterns. Using Verilog, based on Xil
test_ddr3
- 基于XILINX K7系列FPGA实现5120*5120分辨率20帧的DDR3读写，发送到海思3559,HDMI显示。(Based on Xilinx K7 series FPGA to achieve 5120*5120 resolution of 20 frames of DDR3 read and write, sent to the Hays 3559,HDMI display.)