搜索资源列表
DDR_SDRAM_Controller
- DDR RAM控制器的VHDL源码，实现平台是Lattice FPGA，功能验证通过-DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
DDR_SDRAM.rar
- DDR RAM控制器的VHDL源码, 实现平台是Lattice FPGA,DDR RAM controller VHDL source code, the realization of Lattice FPGA platform is
DDRSDRAM_controller
- ddr sdram控制器，lattice器件的参考设计，比较详细-ddr sdram controller, lattice components of the reference design, very detailed
DDR_SDRAM
- ddr sdram 的控制程序，lattice的，比较好用的，大家-ddr sdram control program, lattice, and relatively easy to use, and we look
DDRsdram2
- 一个DDR2 的控制器源码，它是由LATTICE的编译器生成。-A DDR2 controller source code, which is generated by the compiler LATTICE.
lattice_ddr_verilog-for-orca4
- 莱迪思的DDR控制器源码（包括仿真与说明文档），DDR为MT46V16M8，Verilog-The DDR controller source of Lattice (including simulation and documentation), DDR is MT46V16M8, Verilog