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UART.使用FPGA的FIFO，状态机
- 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。,The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
Senior-Advanced-FPGA-design
- FPGA设计高级进阶，讲述了流水线，乒乓操作，异步时钟域处理，状态机等内容-Senior Advanced FPGA design, about the line, ping-pong operation, asynchronous clock domain processing, state machine, etc.
FPGA-design-ideas-and-techniques
- FPGA 设计的四种常用思想与技巧包括：乒乓操作，流水线操作，串并转换技巧，数据接口同步方法-The four commonly used FPGA design ideas and techniques include: ping-pong operation, pipelining, and convert the string technique, synchronous data interface methods
caiji1
- 利用两个双口ram做的乒乓操作，采集高速大容量数据，fpga写，arm读-Two dual-port ram to do the ping-pong operation, collecting high-speed large-capacity data, fpga write, arm reading
FPGA_common_idea
- 本文讨论的四种常用FPGA/CPLD 设计思想与技巧：乒乓操作、串并转换、流水线操作、数据接口同步化，都是FPGA/CPLD 逻辑设计的内在规律的体现，合理地采用这些设计思想能在FPGA/CPLD 设计工作种取得事半功倍的效果。-This article discusses the four commonly used FPGA/CPLD design ideas and techniques: ping-pong operation, strings, and conversion, pipe
EP1C3_10_2_TENNIS
- 里面是个乒乓游戏机的试验程序 要的就下载吧 挺好的 用FPGA-There is a ping-pong game of the test procedure to download it on very good use of FPGA
hdl
- 网上流传的用来实现FPGA驱动VGA，从而实现一个pingpong小游戏的源码，实测可用。-a program embedded in a FPGA in order to drive the VGA and realize a little game named pingpong. tested.
fpga_pong
- fpga code for pong game
Wiley.FPGA.Prototyping.by.VHDL.Examples.Xilinx.Sp
- Wiley,FPGA Prototyping by VHDL examples Spartan 3 version,Pong Chu,
FPGAdesignTech1
- 四种常用FPGA设计技巧，包括乒乓结构等。-Four kinds of commonly used FPGA design skills, including ping-pong structure.
pppppppppppp
- pong game implementation on spartan 3e fpga kit
Pong
- We develop a Pong Game for Cyclone 2 Altera FPGA
Four-FPGA-design-techniques
- FPGA设计的四种常用思想与技巧，包括乒乓操作、串并转换、流水线操作、数据接口同步化-FPGA design of the four common ideas and techniques, including the operation of ping-pong, SERDES, pipelining, synchronization of data interface
pong
- pong in vhdl code fo fpga
SDRAMping-pong-memory-structure
- 双口RAM 的乒乓存储结构（芯片型号CY7C09279） 应用场合为FPGA向双口RAM不断写入数据，PCI总线从RAM读取数据。[已调试验证]-Dual-port RAM, ping-pong memory structure (chip model CY7C09279) applications for the FPGA to the dual-port RAM write data continuously, PCI bus read data from RAM. [Debugging
pong
- PONG GAME VHDL FPGA BASED
Pong
- ping pong game fpga DE1
pong
- Code for pong game for nexys 2 fpga spartan 3e device by digilent
pong
- Simple pong VGA game implemented in VHDL. It can be used as example for FPGA-programmers to show how handle VGA displaying with FGPA device.
PONG_Game1
- pong game verilog code fpga