用Verilog实现一个简单的单周期CPU，并运行Quicksort程序以验证正确性。-This file is written in Verilog to achieve a single cycle processor. It can run in Quartus2.

用Verilog实现一个简单的流水线CPU，并运行一个Quicksort程序。这是Berkley，eecs系的计算机系统结构课程实验的实验三。-This file is written in Verilog to achieve a simple pipeline CPU, which can run a Quicksort program.