搜索资源列表
SIPOICD
- SIPO的详细文档，对大家可能有一定的参考价值，希望对大家有用-SIPO the detailed documentation of all may have some reference value, it may be useful to hope
SIPO
- Filo Serial-Input to Paralle-output
NewFolder2
- Verilog and VHDL programs for sipo buffer,d flip flop etc
UART
- the uart transmitter and receiver are used to design the data transmission for 8bit sipo and piso in verilog
SIPO
- this code is designed to perform serial to parallel it is essential to every design
sipo
- Serial In Parallel Out Shift Register in VHDL in Modelsim
SIPO-PISO-register
- Package contains two VHDL module: one for serial in and parallel out (SIPO) register and other for parallel in and serial out (PISO) register.
sipo
- shifter unit designed in vhdl VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Descr iption Language.
SIPO
- Serial in parrallel out for OFDM