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SPI接口VHDL代码,内有说明,很详细.-SPI interface VHDL code, which has made it clear that, in great detail.
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VHDL语言编写的SPI通信接口,可实现与单片机等外部MCU的通信,且只占用较少的引脚线-Written in VHDL SPI communication interface, can be realized with the microcontroller and other external MCU communication, and only takes less pin line
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本spi参数化通讯模块是一个支持SPI串行通信协议从协议的SPI从接口。可通过改变参数设置传输的位数，由外部控制器给定脉冲控制传输。-The parameters of spi communication module is a support SPI serial communication protocol from the agreement from the SPI interface. By changing the parameter settings can be transmit
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The Serial Peripheral Interface Bus or SPI bus is a synchronous serial data link standard named by Motorola that operates in full duplex mode. Devices communicate in master/slave mode where the master device initiates the data frame. Multiple slave d
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SPI接口的vhdl代码，可以实现与单片机的spi通信，完整的工程-SPI interface of the VHDL code can be achieved with SCM spi communication, complete works
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Module Function Descr iption:
This module allows a SPI ROM to be used in a LX/CS5536 system.
Details are below:
1.Provide a memory window to the SPI EPROM at FFF80000h-FFFFFFFFh (512KB).
2.Provide an interface to the SPI bus to allow the
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一个用vhdl语言写的spi接口实例，经过altera的fpga测试可以使用。-Written in a language with vhdl spi interface to an instance, after the fpga altera test can be used.
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VHDL to use as AD5204 (4-Channel Digital Potentiometer) control driver. SPI interface. Instantiable in any platform.
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This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in
a Xilinx® CoolRunner™ -II CPLD. CoolRunner-II CPLDs are the lowest power CPLDs available,
making this the perfect target device for an SPI Mas
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This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in
a Xilinx CoolRunner™ XPLA3 CPLD.-This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in
a Xilinx CoolRunne
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该项目从需要具有强大而简单的以VHDL编写的SPI接口核心开始，用于通用的FPGA到设备接口。
所产生的内核产生小而高效的电路，从非常慢的SPI时钟到超过50MHz的SPI时钟。-This project started the need to have robust yet simple SPI interface cores written in VHDL to use in generic FPGA-to-device interfacing.
The resulting co
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verilog_spi
A simple demo SPI interface implemented in verilog
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