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mcu与cpld之间spi接口程序，mcu为master，cpld用verilog写成slave模块,mcu with spi interface program between the CPLD, mcu for the master, cpld written using Verilog slave module
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SPI master的verilog代码-Verilog code for SPI master
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SPI总线接口的verilog源码，包含仿真模块modelsim 和 quartus 工程。本人测试通过。-SPI bus interface in verilog source code, including the simulation module modelsim and quartus project. I test.
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用FPGA实现主SPI程序,包含开发工程、测试文件和源文件代码-fpga design the SPI code
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SPI总线Master的verilog代码-SPI Bus Master of Verilog code
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This is a verilog code used oversampled
clock to implement SPI slave. Also include C code for a ARM processor
as the SPI master-This is a verilog code used oversampled
clock to implement SPI slave
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数字通信原理 曹志刚版的SPI总线硬件描述语言Verilog下的实现，含主模式和从模式的实现，经过仿真验证，可作为一个单独的模块使用--Digital Communication Principles of CAO Zhi-gang version of the SPI bus, under the Verilog hardware descr iption language implementation, including Master mode and slave mode of impl
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实现SPI MASTER功能，并有仿真代码和仿真结果。-To achieve SPI MASTER function, and a simulation code and simulation results.
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This a verilog code for SPI Master testbench is also provided
spi_top.v
Xilinx ISE or Icarus verilog to compile and simulate-This is a verilog code for SPI Master testbench is also provided
spi_top.v
Xilinx ISE or Icarus verilog to compile an
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verilog SPI master 的完整实验报告 仅供参考 切勿抄袭-verilog SPI master
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使用Verilog语言实现的SPI控制器，包括SPI主机和从机代码。-Using the Verilog language implementation of SPI controllers, including SPI master and slave codes.
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SPI master verilog code
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code for Master side
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Use code for Maser SPI
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spi-master模块的verilog(simple program for SPI-Master)
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Nitro-Parts-lib-SPI Verilog SPI master and slave
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SPI接口的从机实现（利用verilog HDL语言）(Slave implementation of SPI interface (using Verilog HDL language))
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SPI master slave (fpga/verilog)
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spi 的verilog rtl 代码, 包括整体仿真环境，测试码等(spi master or slave verilog rtl code)
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实现SPI主站通信功能,感兴趣的可以下载。(spi master use verilog.)
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