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verilog实例 [43项]
- 嵌入式可编程器件CPLD的典型实例 压缩包，共计43个源码文件。 使用ALTERA的 Muxplus 软件即可编辑仿真 相关软件可在教育网ftp下载[天网查询，有很多站点提供]-Embedded Programmable CPLD in a typical example of compressed, for a total of 43 source document. Altera Muxplus use the software can edit simulation software av
verilog-som
- 拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现-Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone
ccd-in-verilog
- ALTERA关于CCD的一些verilog程序，都通过运行无误的。
huawei_logic_Design
- FPGA逻辑设计，vhdl/verilog altera/xilinx 介绍
Altera_DDR_controller_core
- Altera DDR SDRAM控制器完整Verilog代码包，包括Verilog源代码，Doc说明文档，仿真DDR芯片模型，仿真testbench等-Altera DDR SDRAM Controller. Verilog source codes, descr iption documents, DDR verilog model and simulation testbench are all included.
altera_fft
- alter官方fft程序 使用verilog编写 需要的同学可以下载-alter the official fft program uses verilog prepared students in need can be downloaded
ref-sdr-sdram-verilog
- 标准SRD SDRAM控制器参考设计，altera提供 Verilog代码,带有使用手册，大家试试交流一下 -Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
VDHL
- Verilog的135个经典设计实例，直流电机控制，游戏机，三态总线，加法器，锁存器等-Verilog s 135 classic design example, DC motor control, video game consoles, three-state bus, adder, latches, etc.
Verilog
- altera公司推荐的verilog代码风格教程-altera recommended verilog code style tutorial
URAT_VHDL_CODE
- altera公司的fpga源代码，用VHDL编写的uart程序。-altera' s fpga source code, uart program written using VHDL.
lcd2tft
- convert lcd 4 bits to tft 16 bits.Writen verilog,Altera Quartus.
FPGA-verilog
- 用Verilog语言编写的一些简单的FPGA入门实验，用ALTERA DE2开发板和Quartus_II软件开发环境。包括：流水灯实验、数码管显示实验-With Verilog language preparation some simple introduction experiment, with FPGA ALTERA DE2 development board and Quartus_II software development environment. Include water l
Verilog-Design
- 包括三个文档: 1.基于Altera Quartus II 的模块化设计应用 2.基于Xilinx ISE的的模块化设计示例 3.模块化设计方法的设计流程-Consists of three documents: 1. Based on Altera Quartus II modular design applications 2. Xilinx ISE based on the modular design of Example 3. Modular Design for desi
sdr-sdram-(verilog)
- Altera的SDR SDRAM模型，verilog实现，带说明书文件以及仿真文件、SDRAM原型文件。-Altera' s SDR SDRAM model, verilog implementation, with manual files and simulation files, SDRAM prototype file.
Altera-verilog-DS1302_ok
- Altera开发板上面，运行OK的DS1302程序；(Altera flatform, dirve ds1302 device, test ok.)
Altera-verilog-I2C
- I2c verilog语言，在开发板上验证过的FPGA端代码程序；(Altera flatform, use verilog code i2c, test ok.)
Altera-verilog-LCD1602
- 用verilog语言编写的驱动lcd1602的代码，用altera fpga开发板验证过；(use verilog code , driving lcd1602 device, test ok.)
Altera-verilog-LCD12864
- 使用Altera FPGA方案，用verilog编程语言，驱动LCD12864器件，在开发板已验证；(use altera fpga flatform, verilog language, driving LCD12864 device, test ok.)
Altera-verilog-StepMotor
- 使用Altera FPGA平台，Verilog编程语言，编写步进电机驱动程序，已在开发板上验证；(on altera fpga flatform, use verilog language, driving stepmotor, and test ok.)
cy4ex1
- 特权同学FPGA开发板的verilog项目代码(the verilog code project of Tequan Altera cyclone4 FPGA development board)