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THS5651是一款高速DA转换器,最高转换频率可到达100MBPS,该程序利用VHDL语言对THS5651进行控制,THS5651 is a high-speed DA converter, the maximum conversion frequency can be arrived at 100MBPS, the use of VHDL language in the process control of the THS5651
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数字下变频器的matlab实现,一定的设计指标,可以用来知道vhdl程序设计,Digital Down Converter for matlab realized, certain design specifications that can be used to know VHDL Programming
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verilog语言实现的数字下变频设计。
在ALTERA的QUARTUS ii下实现。实用,好用。,Verilog language implementation of the digital down-conversion design. ALTERA at the implementation of QUARTUS ii. Practical, easy to use.
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利用Verilog语言实现读取ADS7822模数转换芯片的串行输出数据-it is convinient for us to use A/D converter to get digital data
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YUV到RGB的色彩空间转换器(VHDL,Verilog and doc)-Color Space Converter: Y’CrCb to R’G’B’
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it is a binary16 to BCD converter .it will work on spartan 3 xilini devices.
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Binary to BCD converter
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VHDL to verilog converter
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General Binary-to-BCD Converter
The linked code is a general binary-to-BCD Verilog module, and I have personally tested the code.
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DDS的工作原理是以数控振荡器的方式产生频率、相位可控制的正弦波。电路一般包括基准时钟、频率累加器、相位累加器、幅度/相位转换电路、D/A转换器和低通滤波器(LPF)。频率累加器对输入信号进行累加运算,产生频率控制数据X(frequency data或相位步进量)。相位累加器由N位全加器和N位累加寄存器级联而成,对代表频率的2进制码进行累加运算,是典型的反馈电路,产生累加结果Y。幅度/相位转换电路实质上是一个波形寄存器,以供查表使用。读出的数据送入D/A转换器和低通滤波器。-DDS works
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Converter for Verilog or VHDL to HTML
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基于Verilog的串并转换器的设计与实现,采用两种不同的方案来实现串并和并串转换的功能,并用ISE软件仿真以及chipscope的调试-Verilog-based serial and parallel converter design and implementation of two different programs to achieve the string and and and string conversion functions, and use the ISE softwa
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vhdl to verilog rtl converter, it support simple vhdl syntax, i think it is very useful
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