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- 高速QAM解调器的算法及VLSI实现研究，非常不错的一篇论文，对通信行业人员具有一定的参考意义-High-speed QAM demodulator algorithm and VLSI Implementation, very good paper on the communications industry personnel with some reference value
DesignofIntegratedCircuitsforOpticalCommunications
- Design of Integrated Circuits for Optical Communications deals with the design of high-speed integrated circuits for optical communication systems. Written for both students and practicing engineers, the book systematically takes the reader from basi
electric-8.08
- The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including: * Custom IC layout * Schematic Capture (digital and analog) * Textual Languages such a
mpeg
- code to implement mpeg in vlsi
VLSI_Architectures_for_ECC
- This thesis devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.-This thesis is devoted to sever
VLSIFFTRadix2forDSP
- VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application
High-speedhighperformanceFFT
- 高速高性能FFT处理器的VLSI实现研究，适合做FPGA的技术人员参考研究FFT-High-speed high-performance FFT processor VLSI realization of research, suitable for FPGA technology reference study FFT
thesis1
- thesis report related to vlsi area, specially for oscillator circuits
VLSIrfid
- VLSI implementation of RFID
streamcipherbyvhdl
- describe the vlsi implementation of some stream cipher (RC4,A5/1,helix,E0)
1
- 一维离散小波变换的VLSI设计很好的学习资料-One-dimensional Discrete Wavelet Transform VLSI design of good learning materials
7703611-The-VLSI-Handbook-2nd-Ed
- The VLSI Handbook Second Edition The Electrical Engineering Handbook Series
fulltext
- VLSI Implementation of Discrete Wavelet Transform using Systolic Array Architecture
IterativeDecodingofBinary
- In this paper, energy efficient VLSI architectures for linear turbo equalization are studied. Linear turbo equalizers exhibit dramatic bit error rate (BER) improvement over conventional equalizers by enabling a form of joint equalization and deco
MapAlgorithm
- However, turbo equalizers can be computationally complex and hence require significant power consumption. In this paper, we present an energy-efficient VLSI architecture for such linear turbo equalizers. Key architectural techniques include elimi
LDPC
- VLSI LDPC Soft bit flipping decoder
8100363-CMOS-VLSI-Design-3e-David-Harris-H-E-West
- CMOS VLSI Design 3e David Harris H E Weste Solutions Manual
VLSI-Digital-Signal-Process
- 这是一本介绍超大规模集成电路设计的书籍，相信会有帮助-This is an introductory VLSI design books, I believe will be helpful
VLSI-Architectures-for-Discrete-Wavelet-Transform
- VLSI architecture and VHDL codes for 1D and 2D DWT and IDWT schemes.
VLSI-FINAL-MANUAL
- vlsi manual helps to engineering students for vhdl codes of some practicals