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seriel_74LS164
- 单片机串口驱动74LS164的C语言程序，串并口转换的通讯接口程序-74LS164-driven single-chip serial port of the C language procedures convert string parallel communications interface program
74595
- 串并转换仿真，内有详细说明和仿真波形，能够成功运行-SERDES simulation
RS_232_FULIYE
- vc 6.0下使用MSComm控件进行串口通讯，可进行相应的通讯设置，显示串口数据并动态绘制波形图/曲线图，使用快速傅里叶变换将时域信号的串口数据转换为频域值，并动态显示。代码内有注释-vc 6.0 control for the use of MSComm serial communications, the communications can be set, indicating the serial data and dynamic mapping wave/curve, the use
auk_sdsdi
- 用于FPGA设计的代码（Verilog代码），在FPGA设计中的高速串并转换，时钟提取，对齐处理等功能-for FPGA design ,written by Verilog HDL the functions include SERDES , CDR and so on
s2p
- 一个串并转换的Verilog源码，有questasim仿真。-A string and convert the Verilog source code, there are questasim simulation.
serial
- 一个基于单片机串口通信的程序，包含串并转换电路驱程序，驱动光二极管闪动程序， 串口发送和接收程序！-A microcontroller-based serial communication programs, including string and convert the circuit-drive programs, drivers, LED flashing program, serial port to send and receive programs!
434343
- 这是一个用VHDL语言设计的8位串并转换器，立面有点错误自己仿真修改下-This is a design using VHDL language and the 8-bit string converter, elevation changes a little bit wrong, under their own simulation
temperturecure
- 将串口上接收到的数据转换为温度数值并显示温度曲线-show temperture cure by mscom
serialports2
- 使用verilog以及VHDL编写的将串口数据转换为32位并口数据，作为FPGA和DSP接口使用（DSP型号：6205）-Use verilog and VHDL will be prepared by a 32-bit serial data into parallel data, as the FPGA, and DSP interface (DSP Model: 6205)
ctos
- 利用vhdl完成基于spartan3E开发板的串并转换-Use vhdl complete spartan3E development board based on the string and convert
chu_bing
- 串并转换的一点总结希望对大家有一定的帮助谁有好后点的意见与我联系一下-String and convert the point summed up hope everyone who has a good help to a certain extent after the point of view contact me about
chuanbin
- 对信号进行串并转换，使其分成I,Q2路输出信号 -String and convert the signal to make it into I, Q2 output signal
Serial_Oscilloscope_MSP430F149
- 用MSP430F149做的一个示波器，用Timer A定时触发AD转换，串口发送给电脑，最高采样频率100ksps左右，LABVIEW的visa接受和显示波形并可以控制时间轴和波形放大轴。-oscilloscope with MSP430F149 , starting with Timer A to trigger AD converter, send to the computer with RS232, the maximum sampling frequency 100ksps aroun
C550
- 包括16C550芯片串并转换功能的初始化、并转串、串转并等等源代码-Including the Initialization,parallel data to serial mode and serial data to parale mode function of 16C550 chip.
32bitshiftregister
- 32位带锁存移位寄存器,采用verilog HDL语言编写，可用于串并转换-32-bit shift register with latches, using verilog HDL language can be used for string and convert
dds
- 块DDS芯片中主要包括频率控制寄存器、高速相位累加器和正弦计算器三个部分（如Q2220）。频率控制寄存器可以串行或并行的方式装载并寄存用户输入的频率控制码；而相位累加器根据dds频率控制码在每个时钟周期内进行相位累加，得到一个相位值；正弦计算器则对该相位值计算数字化正弦波幅度（芯片一般通过查表得到）。DDS芯片输出的一般是数字化的正弦波，因此还需经过高速D/A转换器和低通滤波器才能得到一个可用的模拟频率信号。 -In the programming step, the electronic
cbzh
- 串并转换的verilog文件带仿真结果图片的-String and convert the verilog file with simulation results pictures
SampleAppSlave
- CC2430的A/D转换测试程序。程序基于IAR软件编写的。通过A/D通道采集模拟量并转化为数字信号，然后通过串口发送到PC，在PC机可以看到采样结果。估计对开发无线传感器网络的相关人士比较重要-the A/D converter test procedure. Procedures prepared based on the IAR software. Through the A/D channel analog acquisition and digital signal
exam
- vhdl串并口转换实例，VHDL语言实现串并口数据的转换，内有源代码-vhdl examples of serial and parallel conversion, VHDL language serial and parallel data conversion, within the source code
sipo8
- 串入并出源代码，可进行8位数据的串/并转换。其中包括QUARTUS2的完整工程，有正确的仿真波形供参考。-In series and the source code, can be 8-bit data series/parallel conversion. Including QUARTUS2 complete project,and the correct simulation waveform for reference.