搜索资源列表
verilog
- 介绍了一种SPI从机的接口verilog编码-verilog code for spi slave
spi_verilog
- SPI协议Verilog HDL程序,内含testbench 文件
verilog
- 用verilog实现的串并转化,别人写的,感觉不错,与大家共享一下。-serial
PS_2
- 此模块用于"PS/2接口的鼠标或键盘"与"具有外部读写的8位并口单片机"双向通信模块. Verilog HDL语言编写,在Quartus II 8.1 (32-Bit)软件中编译,并下载至EPM7128SLC84-10芯片中通过. 文件中有详细的注解. 此模块具有对于PS/2时钟和数据线的滤波功能,这样减少外部干扰,保证通信的可靠性! -This module for the "PS/2 mouse or keyboard interface" and "read
YUV2RGB
- 关于YUV转RGB的verilog源代码、说明文档和modelsin仿真,相信对大家一定有很大的帮助,我费了好长时间才找到的!-YUV to RGB on the verilog source code, documentation and modelsin simulation, we believe that there will be a great help, I spent a good long time to find it!
32位超前进位加法器(verilog)
- 淘的32位超前进位加法器(verilog),已验证
a_vhdl_8253_timer_latest.tar
- 一个apb总线控制8253的verilog源代码,符合标准的amba 2.0的总线规范-A apb bus control 8253 of the verilog source code, amba 2.0 standard bus specification
ethmac10g verilog代码
- 10G eth mac verilog代码参考下载
rom
- Rom的读取的Verilog代码,自己编写的,大家参考参考啊-Rom read the Verilog code, I have written, your information ah
CRC_32
- 用verilog语言实现的的的32位CRC生成与检验的代码-The 32bits CRC using hardware describe language of verilog
PcodeGeneration
- 在ModelSim或其他支持Verilog语言编译的环境中仿真可得GPS的P码及与卫星数据码调制后的波形,其中一个为源程序,另一个为测试程序-ModelSim or other support in the language Verilog simulation environment to compile available GPS P-code and code of satellite data after the modulation waveform, one for the sour
readmemh
- Verilog使用readmenh()的範例-Verilog using readmenh () example
tlc5615
- TLC5615串行DA的驱动接口,采用verilog编程-TLC5615 driver DA serial interface using verilog programming
verilog-example
- 4位并行乘法器 4位超前加法器 ALU 计数器 滤波器 全加器 序列检测器 移位器-failed to translate
ddrsdram_verilog
- 内附doc是DDR SDRAM 参考设计文档;model包含SDRAM Verilog的模型;simulation包含verilog测试平台、modelsim工程文、设计库函数;source包含verilog源文件;synthesis包含工程的综合文件 。-Enclosing the doc is a DDR SDRAM reference design documentation model contains SDRAM Verilog model simulation with veri
HDB3
- 用verilog HDL语言,通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试 -Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test
DF2C8_04_BEEP
- verilog实现蜂鸣器自动演奏一首乐曲,同时数码管显示当前演奏的简谱音符 符号。-verilog achieve buzzer automatically play a piece of music, and digital display notes the current performance of the musical notation symbols.
lcd
- 基于fpga的tft液晶驱动,控制器是ILI9325,是verilog写的,16位并口模式,我上网上搜索了很久都没找到的,-Fpga based on the tft LCD driver, controller ILI9325, is written in verilog, 16-bit parallel mode, on-line search for a long time I did not find,
verilog
- Verilog 4*4查表法乘法器,应用广泛,速度快。-Verilog hdl。
horse_light4
- 六种花样的流水灯,从左至右,从右至左,中间向两边,两边向中间,跳格闪烁等。verilog语言编写; 并且扩展容易; 有两个状态机构成实现。quartus 9.0和7.1仿真通过。无错误,无警告。-Six kinds of patterns of flowing water lights, from left to right, from right to left, in the middle to both sides, both sides toward the middle, ju