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AD转换.doc
- Verilog
verilog基本功
- verilog基本功---详细介绍verilog编码的基本规则,深入的讲解了一些难点和重点,非常适合初学者学习
Verilog HDL参考资料
- Verilog HDL参考资料 浙江大学
Verilog代码编写规范
- 在一个项目组内部、一个项目的进程中,应该有一套类似的代码编写规范来作为约束。 总的方向是,努力写整洁、可读性好的代码
verilog测试激励
- verilog测试激励的应用和写法
verilog进阶
- 夏宇闻老师编写 verilog进阶 PPT
verilog 代码编写规范
- verilog 代码编写规范
veilog HDL编码规范
- 详细介绍了verilog HDL编码的注意事项和基本规范。分为可综合部分,仿真专用部分以及nc-verilog仿真环境的建立。
apb.rar
- APB master verilog code,APB master verilog code
xge_mac_latest.tar.gz
- Language - Verilog. The 10GE MAC Core implements the Media Access Control functions for 10Gbps operation as defined in IEEE Std 802.3ae. ,Language- Verilog. The 10GE MAC Core implements the Media Access Control functions for 10Gbps operation as defin
Verilog-to-do-SD-card
- 本文档内是基于Verilog HDL的SD卡SPI模式下的读写程序,内有详细的注释,且通俗易懂。-This document is based on Verilog HDL in the SD card in SPI mode to read and write procedures, which are detailed notes, and easy to understand.
cy7c68013工作在SLAVE FIFO下的FPGA源代码
- cy7c68013工作在SLAVE FIFO下的FPGA源代码,已经通过,Verilog编写,cy7c68013 slave fifo mode code ,written by hard ware language
booth_multiplier
- Booth multiplier written in verilog
设计与验证-Verilog HDL
- 设计与验证-Verilog HDL.rar
Verilog
- 是摩托罗拉关于Verilog HDL的开发规范,相信对于学习Verilog程序设计的人会有很大的帮助-Motorola on the development of Verilog HDL specification, I believe that learning Verilog for programming will be of great help to people
IEEE_Verilog_2001
- Verilog 2001 编程规范,作为ASIC和FPGA逻辑开发人员学习不可多得的资料,也可以作为逻辑开发高手们学习查阅的工具。新手们可以按照实例自己编程操练。
DDS
- 基于DDS原理的正弦信号发生器。用VERILOG语言实现,功能强大。-DDS based on the principle of sinusoidal signal generator. Using Verilog language and powerful.
UART_spec
- a UART model with FIFO buffer, design with verilog
iic_master
- it is a iic source verilog code with its testcase which can act only as master
verilog
- Verilog 4*4查表法乘法器,应用广泛,速度快。-Verilog hdl。