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Verilog-to-do-SD-card
- 本文档内是基于Verilog HDL的SD卡SPI模式下的读写程序,内有详细的注释,且通俗易懂。-This document is based on Verilog HDL in the SD card in SPI mode to read and write procedures, which are detailed notes, and easy to understand.
verilog
- Verilog 4*4查表法乘法器,应用广泛,速度快。-Verilog hdl。
VHDLorverilogHDL
- 选择VHDL还是verilog HDL,说明文档-Choice of VHDL or verilog HDL, documentation
QUARTUS_II_compile_and_simulate
- Verilog HDL 在QUARTUS II下的编译和仿真顺序-Verilog HDL in QUARTUS II compiler and simulation under the order of
devider_design
- Abstract循序电路第一个应用是拿来做计数器((笔记) 如何设计计数器? (SOC) (Verilog) (MegaCore)),有了计数器的基础后,就可以拿计数器来设计除频器,最后希望能做出能除N的万用除频器。-Abstract The first application of sequential circuits are used to make counter ((notes) How to design a counter? (SOC) (Verilog) (MegaCore)),
n_evendivider
- 标签: Verilog 分频器 N倍奇数分频器.(Verilog) N_odd_divider.v / Verilog module N_odd_divider (-Labels: Verilog divider divider N odd times. (Verilog) N_odd_divider.v/Verilog module N_odd_divider (
MPEG2_TS_flow_embeded_control_data_design
- MPEG2_TS_flow_embeded_control_data_design.doc格式的有verilog程序!-MPEG2_TS_flow_embeded_control_data_design.docformat verilog program inside!
i2c_verilog
- verilog i2c 控制源代码,包括读写控制-verilog i2c source code control
Verilog
- 是华为的vhdl教程,蛮有用的-Vhdl tutorial is Huawei, quite useless. . . . . . . . . . .
Verilog_2
- an overview of verilog
VerilogHDL
- Verilog HDL 硬件语言 生动地描述了Verilog HDL从入门到精通的经典书籍!-Verilog HDL hardware descr iption language Verilog HDL vividly from entry to the master' s classic books!
SDH
- FPGA的应用,数字交叉连接矩阵的应用,VERILOG的一些应用等-FPGA applications, the application of digital cross-connect matrix, VERILOG some of the applications
Verilog
- Verilog tutorial file
floatmul
- 用verilog实现三十二位浮点数算法,通过状态机的方法实现。-32 floating-point implementation using verilog algorithm, the method adopted by the state machine implementation.
Verilog-HDL-standard
- VERILOG的编码设计规范,使你的程序容易被理解,阅读和维护-VERILOG coding design specifications, to make your program easier to understand, read and maintain
verilog-ieee.pdf.tar
- IEEE 2001 verilog 标准 ,详细讲述了 业内 公认的 VERILOG 标准 ,-The Verilog¤ Hardware Descr iption Language (Verilog HDL) became an IEEE standard in 1995 as IEEE Std 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstractio
verilog-coding-rules
- Verilog HDL可综合RTL级代码设计规范及风格-Verilog HDL RTL level code design specifications and style
pay-verilog
- 出租车计价器程序代码,硬件描述语言,VHDL—verilog-chuzuche meter,VHDL—verilog
verilog
- verilog设计练习进阶,很不错的东西,有兴趣的可以下载-Advanced verilog design practice, very good things, are interested can download
Verilog-DATAS-xiayuwen
- 3.1 引言 3.2 Verilog HDL基本结构 3.3 数据类型及常量、变量 3.4 运算符及表达式 3.5 语句 3.6 赋值语句和块语句 3.7 条件语句3.8 循环语句 3.9 结构说明语句 3.10 编译预处理语句 3.11 语句的顺序执行与并行执行 3.12 不同抽象级别的Verilog HDL模型 3.13 设计技巧-3.1 Introduction 3.2 Verilog HDL basic structure 3.3