搜索资源列表
lc72130
- 三洋锁相环IC L72130的收音搜台驱动代码，- Three oceans phase-locks surround IC L72130 the reception to search for the actuation code,
DPLL
- 数字锁相环DPLL实例程序，帮助理解PLL的结构和详细原理-DPLL DPLL examples of procedures to help understand the structure and PLL detailed Principle
4046PLL
- 采用4046实现的10m以下信号的锁相环 电路图。-used to achieve the 4046 10m below the signal phase-locked loop circuit.
PLLSim
- 二阶锁相环Matlab仿真代码，如入两路信号和信噪比，输出锁相以后的信号。可以仿真初始频差，和频率斜升的情况-second-order PLL Matlab simulation code, such as two-way signals and signal to noise ratio, the output signal after the lock-in. Simulation can initial frequency difference, and frequency ramp-up
easy_pll
- 锁相环设计文档和一个可执行文件-PLL design documents and an executable file
dpll_4
- 实现4阶数字锁相环，老外写的，有详细注释，如果您觉得不错，就re一下-achieve four bands DPLL, a foreigner writing a detailed notes, if you think it's good, what re
2005117163755
- MPSK解调的关键在于载波同步和码元同步．这里采用 数字锁相环实现载波同步和码元同步。-MPSK demodulator is the key carrier synchronization and code synchronization. Here digital PLL carrier synchronization and code synchronization.
verilogpll
- 用verilog语言编写的全数字锁相环的源代码,基于fpga平台-using Verilog language prepared by the DPLL the source code, they simply based on the platform
PLLprogram
- 数字锁相环程序，适合于FM、AM开发 数字锁相环程序，适合于FM、AM开发-DPLL procedures for FM, AM Development DPLL procedures for FM, AM Development
PLLpro
- 关于数字锁相环的使用，结合FM,AM的使用来说明-DPLL on the use of combined FM and AM to illustrate the use of
lmf3
- 这是有关锁相环的一些必用知识.希望能对大家有所帮助哈-This is some of the PLL will use that knowledge. We want to help Kazakhstan
aduc841
- 基于单片机Aduc841的调试程序，包括锁相环PLL4153的驱动和39VF040flash芯片的驱动以及通过串口和上位机通信的代码。-based SCM Aduc841 debugging procedures, PLL PLL4153 including the driver and 39 VF040flash chip and drive through the serial port and PC communications code.
010919.pdf
- 全数字锁相环ＶＨＤＬ描述并实现功能仿真，另附有图形说明-DPLL VHDL descr iption and achieve functional simulation, followed by graphic shows
Div20PLL
- 使用VHDL实现锁相环,是个学习VHDL的好例子,与众分享-PLL using VHDL, VHDL is learning a good example, sharing with the public
PLL_FM
- 用一阶锁相环实现的FM解调器.用ELANIX公司的SYSTEMVIEW运行调试.-with a band of PLL FM demodulator. ELANIX company with the SYSTEMVIEW Win OK debugging.
DDScom
- 直接式数字锁相环频率合成器.用ELANIX公司SYSTEMVIEW运行.-direct digital PLL frequency synthesizer. SYSTEMVIEW ELANIX companies with operations.
c6_PLLsim
- 这个程序是matlab用来来对锁相环（PLL）进行仿真的，这样的选择基于多方面的考虑-This procedure is used Matlab to the phase-locked loop (PLL) simulation, This choice is based on a number of considerations
pll_base_second
- 二阶锁相环的基本MATLAB仿真模型 说明了二阶环对频率阶跃的有效跟踪-second-order PLL basic MATLAB simulation model shows the second part of the effective frequency tracking Step
lmx2325-test
- PLL-LMX2325 C程序,用于锁相环频率控制-PLL-LMX2325 C procedures for the PLL frequency control
pll_improvement
- 一种改进的全数字锁相环设计 一种改进的全数字锁相环设计-an improved DPLL design an improved design DPLL