资源列表
ful2hlf
- 将文本中的全角转变为半角，供后续使用。主要可以用于对网页内容的预处理。-text of the entire half-angle of the angle changes for the use of follow-up. The main website can be used as pretreatment.
cpld
- 一个好用的整数分频电路 保证你喜欢 能够实现对任意整数的分频电路设计-a handy integer frequency divider circuit assures you like to be able to achieve arbitrary integer frequency circuit design
jianpan
- 自己编的基于51单片机的4*4键盘扫描于查表显示程序.
VHDL
- 高质量的VHDL代码乒乓处理FIFO缓存
rls
- 提供rls的matlab实现，用RLS算法设计一个数字滤波器，实现语音增强的目标，得到清晰的语音信号
linked_omp3_tasks
- 有关链表的运算的并行代码程序，基于OpenMP3.0版本的秉性程序-Parallel computing on the list of program code, program based OpenMP3.0 version of mettle
gongefangxiang
- 共轭方向法，要用的自己下来看看吧，很好的优化程序 -Conjugate direction method, we should take a look at it from their own, a good optimizer
cyuanyan
- 判断101-200之间有多少个素数，并输出所有素数。 -Between 101-200 to determine the number of primes, and the output of all prime numbers.
s
- 十进制五位数与五位数加法，可改为十进制各位数加法或者减法-Five-digit number with five decimal addition, you can change the number of decimal addition or subtraction
Noname
- 这是一个运用汇编制作的用于读取文件并且拷贝内容到另一文件的程序-This is a compilation made use of for reading the contents of the file and copy the file to another program
HW-02-13210140
- Verilog code adder for add 2 16bit in parallel-adder for 16bit used to add two bits in parallel. this code in verilog languanger
ILI9225B_Hydis2.2-init-code
- ILI9225B + Hydis2.2 init code-ILI9225B+ Hydis2.2 init code