资源列表
CummingsHDLCON1999_BehavioralDelays_Rev1_1
- Verilog models with behavioral delays
Metastability_in_FPGA
- Don t Let Metastability Cause Problems in Your FPGA-Based Design
xh
- 数字化语音存储与回放 1999年的全国电子设计竞赛题目 ad da 按键 -Digital Voice Storage and Playback in 1999 the National Electronic Design Contest subject ad da button
key2
- FPGA单片机 vhdl编程 正弦波信号发生器 加2个按键控制频率加减-FPGA Microcontroller vhdl programming sine wave signal generator plus two buttons control the frequency of addition and subtraction
dds31
- FPGA单片机开发 正弦波 方波 三角波 信号发生器 按键用单片机控制-FPGA Microcontroller Development sine square triangular wave signal generator control buttons with SCM
aaa
- 12864 液晶 成功显示 汉字 带字库液晶 -12864 LCD display Chinese characters with a character LCD success
DSP_CompactFlashcard
- 介绍CompactFlash卡的基本结构和工作原理；结合美国德州仪器(TI)公司的TMS320C54x 系列数字信号处理器(DSP)，详细地说明了DSP与CompactFlash卡接口设计中的关键软硬件技术；同时以TMS320C549 CSP评估板为基础，设计完成了DSP与CompactFlash卡之间的接口电路，正确实现了DSP对CompactFlash卡的读写及数据管理等各种功能。-CompactFlash card designed by DSP
MTK6228
- MTK6228手机完整的原理图和PCB,做手机的朋友可以参考一下,非常好(包括蓝牙FM电路)PCB用PADS2007可以打开-MTK6228 phone a complete schematic and PCB, make phone a friend for reference, very good (including Bluetooth FM circuits) PCB can be opened with the PADS2007
dataV2.0
- 介绍凌阳单片机的数据采集系统的应用，里面有源代码。-Introduction Sunplus Data Acquisition System, which source code.
lingyuan
- 介绍凌阳单片机比赛用的资料，里面有简易的教程。-Introduction Sunplus race data, which has a simple tutorial.
counter
- 用VHDL语言实现的计时器，最大计时为24小时，计时精度为1ms，设有复位和暂停功能，使用的晶振频率为50Hz。-VHDL language implementation of the timer with a maximum time of 24 hours, timing accuracy of 1ms, with reset, and pause functions, using the crystal oscillator frequency is 50Hz.
test4adder
- 用VHDL实现的加法器，可以进行减法运算，运算结果通过数码管显示，由于设计时的按键较少，所以运算的范围比较小，只能计算64以内的加减法运算，可以作为学习资料来参考。-Adder using VHDL implementation can be carried out subtraction, calculation resulted in the adoption of digital tube display, due to the design of the keys relatively