资源列表
dac
- Delta sigma DAC for use in FPGA includes Testbench
gongyeshengchandeduoluwenxuxunjian
- 工业生产中的多路温度巡回检测系统的设计与实现，其中有各个设计的说明-Industrial production in the multi-temperature scanning detection system design and implementation, including a descr iption of each design
Verilog-HDL_PPT
- 《数字系统设计与Verilog HDL（第4版）》课件-" Digital System Design and Verilog HDL (4th Edition)" Courseware
auto_baud.tar
- 这是一个自动波特率FPGA实现包括源代码对于自适应串口实现有很大的帮助。-This is an automatic baud rate, including the source code for the FPGA to achieve adaptive serial port is very helpful.
verilog
- 这是一个uart串口实现16550的实现，代码已测试过了。-This is a 16550 uart serial port, the code has been tested before.
0130811548Verilog
- this verilog book-this is verilog book
DS18b20
- 多点温度单点多线采用单片机at89c51 ds18b20-Single-point multi-point temperature, multi-line using SCM at89c51 ds18b20
senior-FPGA-design-tech_Xilinx
- 高级FPGA设计技巧，教你如何综合，如何PR，如何做性能优化，让你一步一步成为FPGA设计高手-Advanced FPGA design skills, teach you how to integrate, how to PR, how to do performance optimization, so you step by step to become a master FPGA Design
time
- 用定时器0的方式1实现第一个发光二极管以 200ms间隔闪烁，用定时器1的方式1实现数码 管的前两位59S循环计时 -Timer 0 Mode 1 with the realization of the first flashing light-emitting diodes to 200ms intervals, with the Timer 1 mode 1 for the digital control loop time of the first two 59S
FPGA_timing
- FPGA最重要的就是时序收敛，本资料重点介绍的就是FPGA设计时序收敛，从培训班带过来的资料，讲得非常好，强力推荐~-FPGA timing closure is the most important, the information is focused on FPGA design timing closure, brought over from the training data, made it very good, highly recommended ~
lcd-functional
- lcd功能，非常好用且易于理解。包含简介以及用法，简单易懂-lcd functional, very easy to use and easy to understand. Contains the profiles and usage, easy to understand
ucGUI
- ucgui移植到LPC2200,并测试成功-ucgui transplanted to the LPC2200, and tested successfully